drm/amdgpu: Add uvd indirect to register block

Add uvd indirect method to register access block and replace the
existing calls from adev.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 77813928450b6aa7dd1244adac963830294d0055..f373078d4885cb3e5ece7c5e16b1128e7c572e1d 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -913,11 +913,7 @@ struct amdgpu_device {
        amdgpu_rreg64_t                 pcie_rreg64;
        amdgpu_wreg64_t                 pcie_wreg64;
        amdgpu_rreg64_ext_t                     pcie_rreg64_ext;
-       amdgpu_wreg64_ext_t                     pcie_wreg64_ext;
-       /* protects concurrent UVD register access */
-       spinlock_t uvd_ctx_idx_lock;
-       amdgpu_rreg_t                   uvd_ctx_rreg;
-       amdgpu_wreg_t                   uvd_ctx_wreg;
+       amdgpu_wreg64_ext_t pcie_wreg64_ext;
        /* protects concurrent DIDT register access */
        spinlock_t didt_idx_lock;
        amdgpu_rreg_t                   didt_rreg;
@@ -1340,8 +1336,8 @@ int emu_soc_asic_init(struct amdgpu_device *adev);
 #define WREG64_PCIE_EXT(reg, v) adev->pcie_wreg64_ext(adev, (reg), (v))
 #define RREG32_SMC(reg) amdgpu_reg_smc_rd32(adev, (reg))
 #define WREG32_SMC(reg, v) amdgpu_reg_smc_wr32(adev, (reg), (v))
-#define RREG32_UVD_CTX(reg) adev->uvd_ctx_rreg(adev, (reg))
-#define WREG32_UVD_CTX(reg, v) adev->uvd_ctx_wreg(adev, (reg), (v))
+#define RREG32_UVD_CTX(reg) amdgpu_reg_uvd_ctx_rd32(adev, (reg))
+#define WREG32_UVD_CTX(reg, v) amdgpu_reg_uvd_ctx_wr32(adev, (reg), (v))
 #define RREG32_DIDT(reg) adev->didt_rreg(adev, (reg))
 #define WREG32_DIDT(reg, v) adev->didt_wreg(adev, (reg), (v))
 #define RREG32_GC_CAC(reg) adev->gc_cac_rreg(adev, (reg))

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index f6ca7514a36d436f2e437e63020bd07e333d1e28..d5f92aeab94cb06278bd2ae1efdff666787fe42e 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3842,8 +3842,6 @@ int amdgpu_device_init(struct amdgpu_device *adev,
        adev->pcie_wreg64 = &amdgpu_invalid_wreg64;
        adev->pcie_rreg64_ext = &amdgpu_invalid_rreg64_ext;
        adev->pcie_wreg64_ext = &amdgpu_invalid_wreg64_ext;
-       adev->uvd_ctx_rreg = &amdgpu_invalid_rreg;
-       adev->uvd_ctx_wreg = &amdgpu_invalid_wreg;
        adev->didt_rreg = &amdgpu_invalid_rreg;
        adev->didt_wreg = &amdgpu_invalid_wreg;
        adev->gc_cac_rreg = &amdgpu_invalid_rreg;
@@ -3895,7 +3893,6 @@ int amdgpu_device_init(struct amdgpu_device *adev,
 
        spin_lock_init(&adev->mmio_idx_lock);
        spin_lock_init(&adev->pcie_idx_lock);
-       spin_lock_init(&adev->uvd_ctx_idx_lock);
        spin_lock_init(&adev->didt_idx_lock);
        spin_lock_init(&adev->gc_cac_idx_lock);
        spin_lock_init(&adev->se_cac_idx_lock);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c
index 5debc5c39101be506c1004a33d102d59d9198a81..1f5d6be9a0fde3350ac480ba7caadc662eaf9709 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c
@@ -38,6 +38,10 @@ void amdgpu_reg_access_init(struct amdgpu_device *adev)
        spin_lock_init(&adev->reg.smc.lock);
        adev->reg.smc.rreg = NULL;
        adev->reg.smc.wreg = NULL;
+
+       spin_lock_init(&adev->reg.uvd_ctx.lock);
+       adev->reg.uvd_ctx.rreg = NULL;
+       adev->reg.uvd_ctx.wreg = NULL;
 }
 
 uint32_t amdgpu_reg_smc_rd32(struct amdgpu_device *adev, uint32_t reg)
@@ -58,6 +62,27 @@ void amdgpu_reg_smc_wr32(struct amdgpu_device *adev, uint32_t reg, uint32_t v)
        adev->reg.smc.wreg(adev, reg, v);
 }
 
+uint32_t amdgpu_reg_uvd_ctx_rd32(struct amdgpu_device *adev, uint32_t reg)
+{
+       if (!adev->reg.uvd_ctx.rreg) {
+               dev_err_once(adev->dev,
+                            "UVD_CTX register read not supported\n");
+               return 0;
+       }
+       return adev->reg.uvd_ctx.rreg(adev, reg);
+}
+
+void amdgpu_reg_uvd_ctx_wr32(struct amdgpu_device *adev, uint32_t reg,
+                            uint32_t v)
+{
+       if (!adev->reg.uvd_ctx.wreg) {
+               dev_err_once(adev->dev,
+                            "UVD_CTX register write not supported\n");
+               return;
+       }
+       adev->reg.uvd_ctx.wreg(adev, reg, v);
+}
+
 /*
  * register access helper functions.
  */

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.h
index 225d89eabed5135c490ae64151b6aac98362ed5e..0d66a13c8d5c2beae25e904187450333f395163d 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.h
@@ -40,11 +40,14 @@ struct amdgpu_reg_ind {
 
 struct amdgpu_reg_access {
        struct amdgpu_reg_ind smc;
+       struct amdgpu_reg_ind uvd_ctx;
 };
 
 void amdgpu_reg_access_init(struct amdgpu_device *adev);
 uint32_t amdgpu_reg_smc_rd32(struct amdgpu_device *adev, uint32_t reg);
 void amdgpu_reg_smc_wr32(struct amdgpu_device *adev, uint32_t reg, uint32_t v);
+uint32_t amdgpu_reg_uvd_ctx_rd32(struct amdgpu_device *adev, uint32_t reg);
+void amdgpu_reg_uvd_ctx_wr32(struct amdgpu_device *adev, uint32_t reg, uint32_t v);
 
 typedef uint32_t (*amdgpu_rreg_ext_t)(struct amdgpu_device *, uint64_t);
 typedef void (*amdgpu_wreg_ext_t)(struct amdgpu_device *, uint64_t, uint32_t);

diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c b/drivers/gpu/drm/amd/amdgpu/cik.c
index cd5cd5da4d47ee03554538e6d00205bfa01afb8d..342a496b6020455fff5fb36fc12cdd9eb2417eac 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/cik.c
+++ b/drivers/gpu/drm/amd/amdgpu/cik.c
@@ -201,10 +201,10 @@ static u32 cik_uvd_ctx_rreg(struct amdgpu_device *adev, u32 reg)
        unsigned long flags;
        u32 r;
 
-       spin_lock_irqsave(&adev->uvd_ctx_idx_lock, flags);
+       spin_lock_irqsave(&adev->reg.uvd_ctx.lock, flags);
        WREG32(mmUVD_CTX_INDEX, ((reg) & 0x1ff));
        r = RREG32(mmUVD_CTX_DATA);
-       spin_unlock_irqrestore(&adev->uvd_ctx_idx_lock, flags);
+       spin_unlock_irqrestore(&adev->reg.uvd_ctx.lock, flags);
        return r;
 }
 
@@ -212,10 +212,10 @@ static void cik_uvd_ctx_wreg(struct amdgpu_device *adev, u32 reg, u32 v)
 {
        unsigned long flags;
 
-       spin_lock_irqsave(&adev->uvd_ctx_idx_lock, flags);
+       spin_lock_irqsave(&adev->reg.uvd_ctx.lock, flags);
        WREG32(mmUVD_CTX_INDEX, ((reg) & 0x1ff));
        WREG32(mmUVD_CTX_DATA, (v));
-       spin_unlock_irqrestore(&adev->uvd_ctx_idx_lock, flags);
+       spin_unlock_irqrestore(&adev->reg.uvd_ctx.lock, flags);
 }
 
 static u32 cik_didt_rreg(struct amdgpu_device *adev, u32 reg)
@@ -1988,8 +1988,8 @@ static int cik_common_early_init(struct amdgpu_ip_block *ip_block)
        adev->reg.smc.wreg = cik_smc_wreg;
        adev->pcie_rreg = &cik_pcie_rreg;
        adev->pcie_wreg = &cik_pcie_wreg;
-       adev->uvd_ctx_rreg = &cik_uvd_ctx_rreg;
-       adev->uvd_ctx_wreg = &cik_uvd_ctx_wreg;
+       adev->reg.uvd_ctx.rreg = &cik_uvd_ctx_rreg;
+       adev->reg.uvd_ctx.wreg = &cik_uvd_ctx_wreg;
        adev->didt_rreg = &cik_didt_rreg;
        adev->didt_wreg = &cik_didt_wreg;
 

diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 2e7cd27e45c97c6bd7df49bfd3f60be65bffc51e..d0bc2dcd3066392be0960a829e4b011dcf294d68 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -642,10 +642,6 @@ static int nv_common_early_init(struct amdgpu_ip_block *ip_block)
        adev->pciep_rreg = amdgpu_device_pcie_port_rreg;
        adev->pciep_wreg = amdgpu_device_pcie_port_wreg;
 
-       /* TODO: will add them during VCN v2 implementation */
-       adev->uvd_ctx_rreg = NULL;
-       adev->uvd_ctx_wreg = NULL;
-
        adev->didt_rreg = &nv_didt_rreg;
        adev->didt_wreg = &nv_didt_wreg;
 

diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c
index cbdf8a1c6511b55b9c801433a9a77cdae24b21b1..bbf352ce8a64d1f31323f4c74127e3f837421c63 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/si.c
+++ b/drivers/gpu/drm/amd/amdgpu/si.c
@@ -1099,10 +1099,10 @@ static u32 si_uvd_ctx_rreg(struct amdgpu_device *adev, u32 reg)
        unsigned long flags;
        u32 r;
 
-       spin_lock_irqsave(&adev->uvd_ctx_idx_lock, flags);
+       spin_lock_irqsave(&adev->reg.uvd_ctx.lock, flags);
        WREG32(mmUVD_CTX_INDEX, ((reg) & 0x1ff));
        r = RREG32(mmUVD_CTX_DATA);
-       spin_unlock_irqrestore(&adev->uvd_ctx_idx_lock, flags);
+       spin_unlock_irqrestore(&adev->reg.uvd_ctx.lock, flags);
        return r;
 }
 
@@ -1110,10 +1110,10 @@ static void si_uvd_ctx_wreg(struct amdgpu_device *adev, u32 reg, u32 v)
 {
        unsigned long flags;
 
-       spin_lock_irqsave(&adev->uvd_ctx_idx_lock, flags);
+       spin_lock_irqsave(&adev->reg.uvd_ctx.lock, flags);
        WREG32(mmUVD_CTX_INDEX, ((reg) & 0x1ff));
        WREG32(mmUVD_CTX_DATA, (v));
-       spin_unlock_irqrestore(&adev->uvd_ctx_idx_lock, flags);
+       spin_unlock_irqrestore(&adev->reg.uvd_ctx.lock, flags);
 }
 
 static struct amdgpu_allowed_register_entry si_allowed_read_registers[] = {
@@ -2043,8 +2043,8 @@ static int si_common_early_init(struct amdgpu_ip_block *ip_block)
        adev->pcie_wreg = &si_pcie_wreg;
        adev->pciep_rreg = &si_pciep_rreg;
        adev->pciep_wreg = &si_pciep_wreg;
-       adev->uvd_ctx_rreg = si_uvd_ctx_rreg;
-       adev->uvd_ctx_wreg = si_uvd_ctx_wreg;
+       adev->reg.uvd_ctx.rreg = &si_uvd_ctx_rreg;
+       adev->reg.uvd_ctx.wreg = &si_uvd_ctx_wreg;
        adev->didt_rreg = NULL;
        adev->didt_wreg = NULL;
 

diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 057787ffd19c94ee78357e2729eae5317279f40d..44bc1b71e39566c2a77308f5b59b8d82fdf84372 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -245,10 +245,10 @@ static u32 soc15_uvd_ctx_rreg(struct amdgpu_device *adev, u32 reg)
        address = SOC15_REG_OFFSET(UVD, 0, mmUVD_CTX_INDEX);
        data = SOC15_REG_OFFSET(UVD, 0, mmUVD_CTX_DATA);
 
-       spin_lock_irqsave(&adev->uvd_ctx_idx_lock, flags);
+       spin_lock_irqsave(&adev->reg.uvd_ctx.lock, flags);
        WREG32(address, ((reg) & 0x1ff));
        r = RREG32(data);
-       spin_unlock_irqrestore(&adev->uvd_ctx_idx_lock, flags);
+       spin_unlock_irqrestore(&adev->reg.uvd_ctx.lock, flags);
        return r;
 }
 
@@ -259,10 +259,10 @@ static void soc15_uvd_ctx_wreg(struct amdgpu_device *adev, u32 reg, u32 v)
        address = SOC15_REG_OFFSET(UVD, 0, mmUVD_CTX_INDEX);
        data = SOC15_REG_OFFSET(UVD, 0, mmUVD_CTX_DATA);
 
-       spin_lock_irqsave(&adev->uvd_ctx_idx_lock, flags);
+       spin_lock_irqsave(&adev->reg.uvd_ctx.lock, flags);
        WREG32(address, ((reg) & 0x1ff));
        WREG32(data, (v));
-       spin_unlock_irqrestore(&adev->uvd_ctx_idx_lock, flags);
+       spin_unlock_irqrestore(&adev->reg.uvd_ctx.lock, flags);
 }
 
 static u32 soc15_didt_rreg(struct amdgpu_device *adev, u32 reg)
@@ -969,8 +969,8 @@ static int soc15_common_early_init(struct amdgpu_ip_block *ip_block)
        adev->pcie_wreg64 = &amdgpu_device_indirect_wreg64;
        adev->pcie_rreg64_ext = &amdgpu_device_indirect_rreg64_ext;
        adev->pcie_wreg64_ext = &amdgpu_device_indirect_wreg64_ext;
-       adev->uvd_ctx_rreg = &soc15_uvd_ctx_rreg;
-       adev->uvd_ctx_wreg = &soc15_uvd_ctx_wreg;
+       adev->reg.uvd_ctx.rreg = &soc15_uvd_ctx_rreg;
+       adev->reg.uvd_ctx.wreg = &soc15_uvd_ctx_wreg;
        adev->didt_rreg = &soc15_didt_rreg;
        adev->didt_wreg = &soc15_didt_wreg;
        adev->gc_cac_rreg = &soc15_gc_cac_rreg;

diff --git a/drivers/gpu/drm/amd/amdgpu/soc21.c b/drivers/gpu/drm/amd/amdgpu/soc21.c
index 4d4c1adf00d1e8e97d29ee60406dce2a849753d9..75ed71b1f2423b9f105aceacdf3936bff570c59d 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/soc21.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc21.c
@@ -596,10 +596,6 @@ static int soc21_common_early_init(struct amdgpu_ip_block *ip_block)
        adev->pciep_rreg = amdgpu_device_pcie_port_rreg;
        adev->pciep_wreg = amdgpu_device_pcie_port_wreg;
 
-       /* TODO: will add them during VCN v2 implementation */
-       adev->uvd_ctx_rreg = NULL;
-       adev->uvd_ctx_wreg = NULL;
-
        adev->didt_rreg = &soc21_didt_rreg;
        adev->didt_wreg = &soc21_didt_wreg;
 

diff --git a/drivers/gpu/drm/amd/amdgpu/soc24.c b/drivers/gpu/drm/amd/amdgpu/soc24.c
index 867cc4fdc98fe0166e2f69db1eeb65dbf9380732..d4f3df165090c2c1581b3e488dcb5e73785f17ed 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/soc24.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc24.c
@@ -368,8 +368,6 @@ static int soc24_common_early_init(struct amdgpu_ip_block *ip_block)
        adev->pcie_wreg64 = &amdgpu_device_indirect_wreg64;
        adev->pciep_rreg = amdgpu_device_pcie_port_rreg;
        adev->pciep_wreg = amdgpu_device_pcie_port_wreg;
-       adev->uvd_ctx_rreg = NULL;
-       adev->uvd_ctx_wreg = NULL;
        adev->didt_rreg = NULL;
        adev->didt_wreg = NULL;
 

diff --git a/drivers/gpu/drm/amd/amdgpu/soc_v1_0.c b/drivers/gpu/drm/amd/amdgpu/soc_v1_0.c
index f8a49424adeb4caf3e74e9274da0bc3271f8af0c..6439b09656bff246136c10a8af594292c4cd457a 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/soc_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc_v1_0.c
@@ -260,8 +260,6 @@ static int soc_v1_0_common_early_init(struct amdgpu_ip_block *ip_block)
        adev->pciep_wreg = amdgpu_device_pcie_port_wreg;
        adev->pcie_rreg64_ext = &amdgpu_device_indirect_rreg64_ext;
        adev->pcie_wreg64_ext = &amdgpu_device_indirect_wreg64_ext;
-       adev->uvd_ctx_rreg = NULL;
-       adev->uvd_ctx_wreg = NULL;
        adev->didt_rreg = NULL;
        adev->didt_wreg = NULL;
 

diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index 925cc275fe849241efc27678d182f25d4581a5e9..7d3b331d9217d8d972ca708e8594fb148bfb335e 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -372,10 +372,10 @@ static u32 vi_uvd_ctx_rreg(struct amdgpu_device *adev, u32 reg)
        unsigned long flags;
        u32 r;
 
-       spin_lock_irqsave(&adev->uvd_ctx_idx_lock, flags);
+       spin_lock_irqsave(&adev->reg.uvd_ctx.lock, flags);
        WREG32(mmUVD_CTX_INDEX, ((reg) & 0x1ff));
        r = RREG32(mmUVD_CTX_DATA);
-       spin_unlock_irqrestore(&adev->uvd_ctx_idx_lock, flags);
+       spin_unlock_irqrestore(&adev->reg.uvd_ctx.lock, flags);
        return r;
 }
 
@@ -383,10 +383,10 @@ static void vi_uvd_ctx_wreg(struct amdgpu_device *adev, u32 reg, u32 v)
 {
        unsigned long flags;
 
-       spin_lock_irqsave(&adev->uvd_ctx_idx_lock, flags);
+       spin_lock_irqsave(&adev->reg.uvd_ctx.lock, flags);
        WREG32(mmUVD_CTX_INDEX, ((reg) & 0x1ff));
        WREG32(mmUVD_CTX_DATA, (v));
-       spin_unlock_irqrestore(&adev->uvd_ctx_idx_lock, flags);
+       spin_unlock_irqrestore(&adev->reg.uvd_ctx.lock, flags);
 }
 
 static u32 vi_didt_rreg(struct amdgpu_device *adev, u32 reg)
@@ -1462,8 +1462,8 @@ static int vi_common_early_init(struct amdgpu_ip_block *ip_block)
        }
        adev->pcie_rreg = &vi_pcie_rreg;
        adev->pcie_wreg = &vi_pcie_wreg;
-       adev->uvd_ctx_rreg = &vi_uvd_ctx_rreg;
-       adev->uvd_ctx_wreg = &vi_uvd_ctx_wreg;
+       adev->reg.uvd_ctx.rreg = &vi_uvd_ctx_rreg;
+       adev->reg.uvd_ctx.wreg = &vi_uvd_ctx_wreg;
        adev->didt_rreg = &vi_didt_rreg;
        adev->didt_wreg = &vi_didt_wreg;
        adev->gc_cac_rreg = &vi_gc_cac_rreg;