return true;
}
+/* Implement the "get_shadow_stack_pointer" gdbarch method. */
+
+static std::optional<CORE_ADDR>
+aarch64_linux_get_shadow_stack_pointer (gdbarch *gdbarch, regcache *regcache,
+ bool &shadow_stack_enabled)
+{
+ aarch64_gdbarch_tdep *tdep = gdbarch_tdep<aarch64_gdbarch_tdep> (gdbarch);
+ shadow_stack_enabled = false;
+
+ if (!tdep->has_gcs ())
+ return {};
+
+ uint64_t features_enabled;
+ enum register_status status = regcache->cooked_read (tdep->gcs_linux_reg_base,
+ &features_enabled);
+ if (status != REG_VALID)
+ error (_("Can't read $gcs_features_enabled."));
+
+ CORE_ADDR gcspr;
+ status = regcache->cooked_read (tdep->gcs_reg_base, &gcspr);
+ if (status != REG_VALID)
+ error (_("Can't read $gcspr."));
+
+ shadow_stack_enabled = features_enabled & PR_SHADOW_STACK_ENABLE;
+ return gcspr;
+}
/* AArch64 Linux implementation of the report_signal_info gdbarch
hook. Displays information about possible memory tag violations. */
sections. */
set_gdbarch_use_target_description_from_corefile_notes (gdbarch,
aarch64_use_target_description_from_corefile_notes);
+
+ if (tdep->has_gcs ())
+ set_gdbarch_get_shadow_stack_pointer (gdbarch,
+ aarch64_linux_get_shadow_stack_pointer);
}
#if GDB_SELF_TEST
regcache_cooked_write_unsigned (regs, tdep->gcs_reg_base, gcs_addr);
}
+/* Remove the newest entry from the Guarded Control Stack. */
+
+static void
+aarch64_pop_gcs_entry (regcache *regs)
+{
+ gdbarch *arch = regs->arch ();
+ aarch64_gdbarch_tdep *tdep = gdbarch_tdep<aarch64_gdbarch_tdep> (arch);
+ CORE_ADDR gcs_addr;
+
+ enum register_status status = regs->cooked_read (tdep->gcs_reg_base,
+ &gcs_addr);
+ if (status != REG_VALID)
+ error ("Can't read $gcspr.");
+
+ /* Update GCSPR. */
+ regcache_cooked_write_unsigned (regs, tdep->gcs_reg_base, gcs_addr + 8);
+}
+
/* Implement the "shadow_stack_push" gdbarch method. */
static void
/* PC adjustment offset after displaced stepping. If 0, then we don't
write the PC back, assuming the PC is already the right address. */
int32_t pc_adjust = 0;
+
+ /* True if it's a branch instruction that saves the link register. */
+ bool linked_branch = false;
};
/* Data when visiting instructions for displaced stepping. */
/* Update LR. */
regcache_cooked_write_unsigned (dsd->regs, AARCH64_LR_REGNUM,
data->insn_addr + 4);
+ dsd->dsc->linked_branch = true;
+ bool gcs_is_enabled;
+ gdbarch_get_shadow_stack_pointer (dsd->regs->arch (), dsd->regs,
+ gcs_is_enabled);
+ if (gcs_is_enabled)
+ aarch64_push_gcs_entry (dsd->regs, data->insn_addr + 4);
}
}
aarch64_emit_insn (dsd->insn_buf, insn & 0xffdfffff);
regcache_cooked_write_unsigned (dsd->regs, AARCH64_LR_REGNUM,
data->insn_addr + 4);
+ dsd->dsc->linked_branch = true;
+ bool gcs_is_enabled;
+ gdbarch_get_shadow_stack_pointer (dsd->regs->arch (), dsd->regs,
+ gcs_is_enabled);
+ if (gcs_is_enabled)
+ aarch64_push_gcs_entry (dsd->regs, data->insn_addr + 4);
}
else
aarch64_emit_insn (dsd->insn_buf, insn);
CORE_ADDR from, CORE_ADDR to,
struct regcache *regs, bool completed_p)
{
+ aarch64_displaced_step_copy_insn_closure *dsc
+ = (aarch64_displaced_step_copy_insn_closure *) dsc_;
CORE_ADDR pc = regcache_read_pc (regs);
- /* If the displaced instruction didn't complete successfully then all we
- need to do is restore the program counter. */
+ /* If the displaced instruction didn't complete successfully then we need
+ to restore the program counter, and perhaps the Guarded Control Stack. */
if (!completed_p)
{
+ bool gcs_is_enabled;
+ gdbarch_get_shadow_stack_pointer (gdbarch, regs, gcs_is_enabled);
+ if (dsc->linked_branch && gcs_is_enabled)
+ aarch64_pop_gcs_entry (regs);
+
pc = from + (pc - to);
regcache_write_pc (regs, pc);
return;
}
- aarch64_displaced_step_copy_insn_closure *dsc
- = (aarch64_displaced_step_copy_insn_closure *) dsc_;
-
displaced_debug_printf ("PC after stepping: %s (was %s).",
paddress (gdbarch, pc), paddress (gdbarch, to));