realtek: move and clean up CHIP_INFO register definitions

Move the definitions to mach-rtl83xx.h, so they can be used during init
to read more detailed SoC information. Also rename the RTL931X register,
as it has the same address on all RTL93xx.

Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/19653
Signed-off-by: Robert Marko <robimarko@gmail.com>

diff --git a/target/linux/realtek/files-6.12/arch/mips/include/asm/mach-rtl838x/mach-rtl83xx.h b/target/linux/realtek/files-6.12/arch/mips/include/asm/mach-rtl838x/mach-rtl83xx.h
index d53414fec74ea2469e6e4acfd98e4d5fcb5b3d0c..e611b7aebc9f657d8898f9ccb03b96415375db23 100644 (file)
--- a/target/linux/realtek/files-6.12/arch/mips/include/asm/mach-rtl838x/mach-rtl83xx.h
+++ b/target/linux/realtek/files-6.12/arch/mips/include/asm/mach-rtl838x/mach-rtl83xx.h
@@ -222,9 +222,11 @@
 #define RTL930X_GPIO_PCD_IMR            (RTL930X_GPIO_CTRL_REG_BASE + 0x18)
 
 #define RTL838X_MODEL_NAME_INFO                (0x00D4)
+#define RTL838X_CHIP_INFO              (0x00D8)
 #define RTL839X_MODEL_NAME_INFO                (0x0FF0)
+#define RTL839X_CHIP_INFO              (0x0FF4)
 #define RTL93XX_MODEL_NAME_INFO                (0x0004)
-#define RTL931X_CHIP_INFO_ADDR         (0x0008)
+#define RTL93XX_CHIP_INFO              (0x0008)
 
 #define RTL838X_LED_GLB_CTRL           (0xA000)
 #define RTL839X_LED_GLB_CTRL           (0x00E4)

diff --git a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl838x.h b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl838x.h
index 311f110589c392947dbd7b92a4988d5ecf3c8607..896e9ab24b3d1e6e44b6ea99a12af8bf017c23c2 100644 (file)
--- a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl838x.h
+++ b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl838x.h
@@ -25,8 +25,6 @@
 #define RTL838X_SDS_MODE_SEL                   (0x0028)
 #define RTL838X_SDS_CFG_REG                    (0x0034)
 #define RTL838X_INT_MODE_CTRL                  (0x005c)
-#define RTL838X_CHIP_INFO                      (0x00d8)
-#define RTL839X_CHIP_INFO                      (0x0ff4)
 #define RTL838X_PORT_ISO_CTRL(port)            (0x4100 + ((port) << 2))
 #define RTL839X_PORT_ISO_CTRL(port)            (0x1400 + ((port) << 3))
 

diff --git a/target/linux/realtek/files-6.12/drivers/net/ethernet/rtl838x_eth.h b/target/linux/realtek/files-6.12/drivers/net/ethernet/rtl838x_eth.h
index ef79eec5bf8a95e1f53ff88252162e560bd88927..c28a94ed9ff2daceb70572f31fc91dfa6195c47a 100644 (file)
--- a/target/linux/realtek/files-6.12/drivers/net/ethernet/rtl838x_eth.h
+++ b/target/linux/realtek/files-6.12/drivers/net/ethernet/rtl838x_eth.h
@@ -94,7 +94,6 @@
 #define RTL838X_SDS_MODE_SEL                   (0x0028)
 #define RTL838X_SDS_CFG_REG                    (0x0034)
 #define RTL838X_INT_MODE_CTRL                  (0x005c)
-#define RTL838X_CHIP_INFO                      (0x00d8)
 #define RTL838X_SDS4_REG28                     (0xef80)
 #define RTL838X_SDS4_DUMMY0                    (0xef8c)
 #define RTL838X_SDS5_EXT_REG6                  (0xf18c)

diff --git a/target/linux/realtek/files-6.12/drivers/net/phy/rtl83xx-phy.c b/target/linux/realtek/files-6.12/drivers/net/phy/rtl83xx-phy.c
index 82e81e15193299fc99173b936c1c2516f8e974b3..98066bf233e87c3026e89862fe9cfa66b7681dc3 100644 (file)
--- a/target/linux/realtek/files-6.12/drivers/net/phy/rtl83xx-phy.c
+++ b/target/linux/realtek/files-6.12/drivers/net/phy/rtl83xx-phy.c
@@ -3461,8 +3461,8 @@ void rtl931x_sds_init(u32 sds, phy_interface_t mode)
                        rtl931x_write_sds_phy(asds, 0x2E, 0x1, board_sds_tx_type1[sds - 2]);
                else {
                        val = 0xa0000;
-                       sw_w32(val, RTL931X_CHIP_INFO_ADDR);
-                       val = sw_r32(RTL931X_CHIP_INFO_ADDR);
+                       sw_w32(val, RTL93XX_CHIP_INFO);
+                       val = sw_r32(RTL93XX_CHIP_INFO);
                        if (val & BIT(28)) /* consider 9311 etc. RTL9313_CHIP_ID == HWP_CHIP_ID(unit)) */
                        {
                                rtl931x_write_sds_phy(asds, 0x2E, 0x1, board_sds_tx2[sds - 2]);
@@ -3470,7 +3470,7 @@ void rtl931x_sds_init(u32 sds, phy_interface_t mode)
                                rtl931x_write_sds_phy(asds, 0x2E, 0x1, board_sds_tx[sds - 2]);
                        }
                        val = 0;
-                       sw_w32(val, RTL931X_CHIP_INFO_ADDR);
+                       sw_w32(val, RTL93XX_CHIP_INFO);
                }
        }