drm/i915/cx0: Zero Cx0 PLL state before compute and HW readout

Ensure Cx0 pll state is initialized to zero before any computation or HW
readouts, to prevent leaving some parameter in the state uninitialized
in the actual compute/HW readout functions later.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://lore.kernel.org/r/20251117104602.2363671-14-mika.kahola@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
index 0ad9fae230c91c26885b5906f169086c90c352fe..df3daa81a69830563fdc3ffb0ecc020eb1def9de 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
@@ -2679,6 +2679,8 @@ static int intel_c20pll_calc_state(struct intel_crtc_state *crtc_state,
 int intel_cx0pll_calc_state(struct intel_crtc_state *crtc_state,
                            struct intel_encoder *encoder)
 {
+       memset(&crtc_state->dpll_hw_state, 0, sizeof(crtc_state->dpll_hw_state));
+
        if (intel_encoder_is_c10phy(encoder))
                return intel_c10pll_calc_state(crtc_state, encoder);
        return intel_c20pll_calc_state(crtc_state, encoder);
@@ -3612,7 +3614,7 @@ static void intel_c10pll_state_verify(const struct intel_crtc_state *state,
 void intel_cx0pll_readout_hw_state(struct intel_encoder *encoder,
                                   struct intel_cx0pll_state *pll_state)
 {
-       pll_state->use_c10 = false;
+       memset(pll_state, 0, sizeof(*pll_state));
 
        pll_state->tbt_mode = intel_tc_port_in_tbt_alt_mode(enc_to_dig_port(encoder));
        if (pll_state->tbt_mode)