Add VG_ prefix to SKIPLIST_INIT and IS_*_ALIGNED macros. Also pull

IS_PAGE_ALIGNED into tool.h with the others.

git-svn-id: svn://svn.valgrind.org/valgrind/trunk@3457

diff --git a/addrcheck/ac_main.c b/addrcheck/ac_main.c
index 7ed3de10c11535e4d6a264ba992e9aba520c83e6..eb06979998e2579778c1b76ed2981264e06d5f6a 100644 (file)
--- a/addrcheck/ac_main.c
+++ b/addrcheck/ac_main.c
@@ -246,7 +246,7 @@ static __inline__ UChar get_abits4_ALIGNED ( Addr a )
    UChar   abits8;
    PROF_EVENT(24);
 #  ifdef VG_DEBUG_MEMORY
-   tl_assert(IS_4_ALIGNED(a));
+   tl_assert(VG_IS_4_ALIGNED(a));
 #  endif
    sm     = primary_map[PM_IDX(a)];
    sm_off = SM_OFF(a);
@@ -891,7 +891,7 @@ void ac_fpu_ACCESS_check ( Addr addr, SizeT size, Bool isWrite )
 #  else
 
    if (size == 4) {
-      if (!IS_4_ALIGNED(addr)) goto slow4;
+      if (!VG_IS_4_ALIGNED(addr)) goto slow4;
       PROF_EVENT(91);
       /* Properly aligned. */
       sm     = primary_map[PM_IDX(addr)];
@@ -906,7 +906,7 @@ void ac_fpu_ACCESS_check ( Addr addr, SizeT size, Bool isWrite )
    }
 
    if (size == 8) {
-      if (!IS_4_ALIGNED(addr)) goto slow8;
+      if (!VG_IS_4_ALIGNED(addr)) goto slow8;
       PROF_EVENT(92);
       /* Properly aligned.  Do it in two halves. */
       addr4 = addr + 4;
@@ -1166,7 +1166,7 @@ static
 Bool ac_is_valid_address ( Addr a )
 {
    UChar abits;
-   tl_assert(IS_4_ALIGNED(a));
+   tl_assert(VG_IS_4_ALIGNED(a));
    abits = get_abits4_ALIGNED(a);
    if (abits == VGM_NIBBLE_VALID) {
       return True;

diff --git a/coregrind/vg_memory.c b/coregrind/vg_memory.c
index 421f70d98313000cca61315c288a486cb42934dc..6b9307db94fc4612e1b3c6a409263d693a22f154 100644 (file)
--- a/coregrind/vg_memory.c
+++ b/coregrind/vg_memory.c
@@ -37,9 +37,6 @@
 
 static const Bool mem_debug = False;
 
-#define IS_PAGE_ALIGNED(_aa)  (((_aa) & (VKI_PAGE_SIZE-1)) == 0)
-
-
 /*--------------------------------------------------------------*/
 /*--- A simple, self-contained ordered array of segments.    ---*/
 /*--------------------------------------------------------------*/
@@ -347,7 +344,7 @@ static Int split_segment ( Addr a )
 {
    Int r;
    HWord delta;
-   vg_assert(IS_PAGE_ALIGNED(a));
+   vg_assert(VG_IS_PAGE_ALIGNED(a));
    r = find_segment(a);
    if (r == -1)
       /* not found */
@@ -562,8 +559,8 @@ void VG_(unmap_range)(Addr addr, SizeT len)
    end = addr+len;
 
    /* Everything must be page-aligned */
-   vg_assert(IS_PAGE_ALIGNED(addr));
-   vg_assert(IS_PAGE_ALIGNED(len));
+   vg_assert(VG_IS_PAGE_ALIGNED(addr));
+   vg_assert(VG_IS_PAGE_ALIGNED(len));
 
    for (i = 0; i < segments_used; i++) {
 
@@ -675,7 +672,7 @@ VG_(map_file_segment)( Addr addr, SizeT len,
          addr, (ULong)len, prot, flags, dev, ino, off, filename);
 
    /* Everything must be page-aligned */
-   vg_assert(IS_PAGE_ALIGNED(addr));
+   vg_assert(VG_IS_PAGE_ALIGNED(addr));
    len = PGROUNDUP(len);
 
    /* Nuke/truncate any existing segment(s) covering [addr,addr+len) */
@@ -786,7 +783,7 @@ void VG_(mprotect_range)(Addr a, SizeT len, UInt prot)
    if (0) show_segments( "mprotect_range(before)" );
 
    /* Everything must be page-aligned */
-   vg_assert(IS_PAGE_ALIGNED(a));
+   vg_assert(VG_IS_PAGE_ALIGNED(a));
    len = PGROUNDUP(len);
 
    split_segment(a);
@@ -877,8 +874,8 @@ Addr VG_(find_map_space)(Addr addr, SizeT len, Bool for_client)
       if (hole_start == hole_end+1)
          continue;
 
-      vg_assert(IS_PAGE_ALIGNED(hole_start));
-      vg_assert(IS_PAGE_ALIGNED(hole_end+1));
+      vg_assert(VG_IS_PAGE_ALIGNED(hole_start));
+      vg_assert(VG_IS_PAGE_ALIGNED(hole_end+1));
 
       /* ignore holes which fall outside the allowable area */
       if (!(hole_start >= base && hole_end <= limit))
@@ -886,7 +883,7 @@ Addr VG_(find_map_space)(Addr addr, SizeT len, Bool for_client)
 
       vg_assert(hole_end > hole_start);
       hole_len = hole_end - hole_start + 1;
-      vg_assert(IS_PAGE_ALIGNED(hole_len));
+      vg_assert(VG_IS_PAGE_ALIGNED(hole_len));
 
       if (hole_len >= len && i_any == -1) {
          /* It will at least fit in this hole. */
@@ -1119,8 +1116,8 @@ Bool VG_(is_addressable)(Addr p, SizeT size, UInt prot)
 
    p    = PGROUNDDN(p);
    size = PGROUNDUP(size);
-   vg_assert(IS_PAGE_ALIGNED(p));
-   vg_assert(IS_PAGE_ALIGNED(size));
+   vg_assert(VG_IS_PAGE_ALIGNED(p));
+   vg_assert(VG_IS_PAGE_ALIGNED(size));
 
    for (; size > 0; size -= VKI_PAGE_SIZE) {
       seg = VG_(find_segment)(p);
@@ -1288,8 +1285,8 @@ void *VG_(shadow_alloc)(UInt size)
       goto failed;
 
    try_here = shadow_alloc;
-   vg_assert(IS_PAGE_ALIGNED(try_here));
-   vg_assert(IS_PAGE_ALIGNED(size));
+   vg_assert(VG_IS_PAGE_ALIGNED(try_here));
+   vg_assert(VG_IS_PAGE_ALIGNED(size));
    vg_assert(size > 0);
 
    if (0)

diff --git a/coregrind/vg_pthreadmodel.c b/coregrind/vg_pthreadmodel.c
index c7f3120f76d98ff024ef4439ef4e64ec4edca4d6..5bc7c121de9d83e62faef145388a3964226443b3 100644 (file)
--- a/coregrind/vg_pthreadmodel.c
+++ b/coregrind/vg_pthreadmodel.c
@@ -112,7 +112,7 @@ static Int pthread_cmp(const void *v1, const void *v2)
    return VG_(memcmp)(a, b, sizeof(*a));
 }
 
-static SkipList sk_pthread_map = SKIPLIST_INIT(struct pthread_map, id, pthread_cmp, 
+static SkipList sk_pthread_map = VG_SKIPLIST_INIT(struct pthread_map, id, pthread_cmp, 
                                               NULL, VG_AR_CORE);
 
 /* Find a ThreadId for a particular pthread_t; block until it becomes available */

diff --git a/coregrind/vg_redir.c b/coregrind/vg_redir.c
index 5461202d2203c16225281b3e775d1760029f93d7..8e296e157c979a56bc9706a411330f9daa952f8f 100644 (file)
--- a/coregrind/vg_redir.c
+++ b/coregrind/vg_redir.c
@@ -81,7 +81,7 @@ static Char *straddr(void *p)
    return buf;
 }
 
-static SkipList sk_resolved_redir = SKIPLIST_INIT(CodeRedirect, from_addr, 
+static SkipList sk_resolved_redir = VG_SKIPLIST_INIT(CodeRedirect, from_addr, 
                                                  VG_(cmp_Addr), straddr, VG_AR_SYMTAB);
 static CodeRedirect *unresolved_redir = NULL;
 
@@ -518,7 +518,7 @@ void VG_(setup_code_redirect_table) ( void )
 //:: }
 //:: 
 //:: /* List of wrapped call invocations which are currently active */
-//:: static SkipList wrapped_frames = SKIPLIST_INIT(struct call_instance, key, keycmp, 
+//:: static SkipList wrapped_frames = VG_SKIPLIST_INIT(struct call_instance, key, keycmp, 
 //::                                          NULL, VG_AR_SYMTAB);
 //:: 
 //:: static struct call_instance *find_call(Addr retaddr, Addr argsp, ThreadId tid)
@@ -611,11 +611,11 @@ void VG_(setup_code_redirect_table) ( void )
 //:: };
 //:: 
 //:: /* A mapping from eip of wrapped function entrypoints to actual wrappers */
-//:: static SkipList wrapped_functions = SKIPLIST_INIT(struct wrapped_function, eip, VG_(cmp_Addr),
+//:: static SkipList wrapped_functions = VG_SKIPLIST_INIT(struct wrapped_function, eip, VG_(cmp_Addr),
 //::                                             NULL, VG_AR_SYMTAB);
 //:: 
 //:: /* A set of EIPs which are return addresses for wrapped functions */
-//:: static SkipList wrapper_returns = SKIPLIST_INIT(struct wrapper_return, eip, VG_(cmp_Addr),
+//:: static SkipList wrapper_returns = VG_SKIPLIST_INIT(struct wrapper_return, eip, VG_(cmp_Addr),
 //::                                           NULL, VG_AR_SYMTAB);
 //:: 
 //:: /* Wrap function starting at eip */

diff --git a/coregrind/vg_scheduler.c b/coregrind/vg_scheduler.c
index 8ed2a36db76bd6259420629acdb096c27301b6c1..66ff80f377f6e64a6449ea9aae50f244bc20b934 100644 (file)
--- a/coregrind/vg_scheduler.c
+++ b/coregrind/vg_scheduler.c
@@ -481,13 +481,13 @@ UInt run_thread_for_a_while ( ThreadId tid )
                (void*)a_vex, sz_vex, (void*)a_vexsh, sz_vexsh,
                (void*)a_spill, sz_spill );
 
-   vg_assert(IS_8_ALIGNED(sz_vex));
-   vg_assert(IS_8_ALIGNED(sz_vexsh));
-   vg_assert(IS_16_ALIGNED(sz_spill));
+   vg_assert(VG_IS_8_ALIGNED(sz_vex));
+   vg_assert(VG_IS_8_ALIGNED(sz_vexsh));
+   vg_assert(VG_IS_16_ALIGNED(sz_spill));
 
-   vg_assert(IS_4_ALIGNED(a_vex));
-   vg_assert(IS_4_ALIGNED(a_vexsh));
-   vg_assert(IS_4_ALIGNED(a_spill));
+   vg_assert(VG_IS_4_ALIGNED(a_vex));
+   vg_assert(VG_IS_4_ALIGNED(a_vexsh));
+   vg_assert(VG_IS_4_ALIGNED(a_spill));
 
    vg_assert(sz_vex == sz_vexsh);
    vg_assert(a_vex + sz_vex == a_vexsh);

diff --git a/coregrind/vg_skiplist.c b/coregrind/vg_skiplist.c
index 4fdd9143d33a5832815a9140d01511b60ad35f84..02d345c48ba0f6d891f6bfab129e96303ddb74d7 100644 (file)
--- a/coregrind/vg_skiplist.c
+++ b/coregrind/vg_skiplist.c
@@ -60,7 +60,7 @@
                 :               :
 
 
-   When you declare the list with SKIPLIST_INIT, you specify the
+   When you declare the list with VG_SKIPLIST_INIT, you specify the
    structure for each list node, structure member you want to use as a
    key, and the function for comparing keys.
 

diff --git a/coregrind/vg_threadmodel.c b/coregrind/vg_threadmodel.c
index a1bec5d83ceccd6af6101c4349b6b3fef1123baf..69399edabd51400b00c1536c84f773216096080e 100644 (file)
--- a/coregrind/vg_threadmodel.c
+++ b/coregrind/vg_threadmodel.c
@@ -250,7 +250,7 @@
 //::    thread_setstate(th, TS_Dead);
 //:: }
 //:: 
-//:: static SkipList sk_threads = SKIPLIST_INIT(struct thread, tid, VG_(cmp_UInt), NULL, VG_AR_CORE);
+//:: static SkipList sk_threads = VG_SKIPLIST_INIT(struct thread, tid, VG_(cmp_UInt), NULL, VG_AR_CORE);
 //:: 
 //:: static struct thread *thread_get(ThreadId tid)
 //:: {
@@ -683,7 +683,7 @@
 //::    VG_(pp_ExeContext)(mx->ec_create);
 //:: }
 //:: 
-//:: static SkipList sk_mutex = SKIPLIST_INIT(struct mutex, mutex, VG_(cmp_Addr), NULL, VG_AR_CORE);
+//:: static SkipList sk_mutex = VG_SKIPLIST_INIT(struct mutex, mutex, VG_(cmp_Addr), NULL, VG_AR_CORE);
 //:: 
 //:: static struct mutex *mutex_get(Addr mutexp)
 //:: {
@@ -1007,7 +1007,7 @@
 //::    CVE_Blocked,
 //:: };
 //:: 
-//:: static SkipList sk_condvar = SKIPLIST_INIT(struct condvar, condvar, VG_(cmp_Addr),
+//:: static SkipList sk_condvar = VG_SKIPLIST_INIT(struct condvar, condvar, VG_(cmp_Addr),
 //::                                      NULL, VG_AR_CORE);
 //:: 
 //:: static struct condvar *condvar_get(Addr condp)

diff --git a/docs/64-bit-cleanness b/docs/64-bit-cleanness
index 7b73b86eccc54448f1df3e95a2f02341a697e472..5b45f0c898e66398b8ef239e42a7c98331d771f6 100644 (file)
--- a/docs/64-bit-cleanness
+++ b/docs/64-bit-cleanness
@@ -12,7 +12,7 @@ Memcheck is full of 32-bit assumptions:
   new_mem_stack_1wd, etc.  Also then need to change
   make_aligned_word_noaccess() et al (heaps of places)
 - also rotateRight16 and all its dependents...
-- all the calls to IS_ALIGNED4_ADDR are 32-bit specific code.  Likewise
+- all the calls to VG_IS_ALIGNED4_ADDR are 32-bit specific code.  Likewise
   with Addrcheck?  Not sure.  Plus there's one in vg_transtab.c which doesn't
   look right.
 

diff --git a/include/tool.h.base b/include/tool.h.base
index 243dc552fbb4e69f458ed9589b04694b6f02a165..3ed497dde3bf6f293ea3c28b74e51838f8fa7a10 100644 (file)
--- a/include/tool.h.base
+++ b/include/tool.h.base
@@ -266,10 +266,11 @@ extern void VG_(popcc)  ( UInt cc );
 extern ULong VG_(bbs_done);
 
 /* Check if an address/whatever is aligned */
-#define IS_4_ALIGNED(aaa_p)     (0 == (((Addr)(aaa_p)) & 0x3))
-#define IS_8_ALIGNED(aaa_p)     (0 == (((Addr)(aaa_p)) & 0x7))
-#define IS_16_ALIGNED(aaa_p)    (0 == (((Addr)(aaa_p)) & 0xf))
-#define IS_WORD_ALIGNED(aaa_p)  (0 == (((Addr)(aaa_p)) & (sizeof(Addr)-1)))
+#define VG_IS_4_ALIGNED(aaa_p)      (0 == (((Addr)(aaa_p)) & 0x3))
+#define VG_IS_8_ALIGNED(aaa_p)      (0 == (((Addr)(aaa_p)) & 0x7))
+#define VG_IS_16_ALIGNED(aaa_p)     (0 == (((Addr)(aaa_p)) & 0xf))
+#define VG_IS_WORD_ALIGNED(aaa_p)   (0 == (((Addr)(aaa_p)) & (sizeof(Addr)-1)))
+#define VG_IS_PAGE_ALIGNED(aaa_p)   (0 == (((Addr)(aaa_p)) & (VKI_PAGE_SIZE-1)))
 
 
 /* ------------------------------------------------------------------ */
@@ -829,7 +830,7 @@ struct _SkipList {
    _strkey is a function which can return a string of your key - it's only used for debugging
    _arena is the arena to use for allocation - -1 is the default
  */
-#define SKIPLIST_INIT(_type, _key, _cmp, _strkey, _arena)              \
+#define VG_SKIPLIST_INIT(_type, _key, _cmp, _strkey, _arena)           \
        {                                                               \
           .arena       = _arena,                                       \
           .size        = sizeof(_type),                                \

diff --git a/memcheck/mac_shared.h b/memcheck/mac_shared.h
index 0947fed8424c5392d70dc862177be75c9dfde728..1ea76195b7a20a3f0d44c32e6ab0959eac5cacf8 100644 (file)
--- a/memcheck/mac_shared.h
+++ b/memcheck/mac_shared.h
@@ -416,7 +416,7 @@ extern            void MAC_(new_mem_stack) ( Addr a, SizeT len);
 void REGPARM(1) MAC_(new_mem_stack_4)(Addr new_ESP)                           \
 {                                                                             \
    PROF_EVENT(110);                                                           \
-   if (IS_4_ALIGNED(new_ESP)) {                                               \
+   if (VG_IS_4_ALIGNED(new_ESP)) {                                            \
       ALIGNED4_NEW  ( new_ESP );                                              \
    } else {                                                                   \
       UNALIGNED_NEW ( new_ESP, 4 );                                           \
@@ -426,7 +426,7 @@ void REGPARM(1) MAC_(new_mem_stack_4)(Addr new_ESP)                           \
 void REGPARM(1) MAC_(die_mem_stack_4)(Addr new_ESP)                           \
 {                                                                             \
    PROF_EVENT(120);                                                           \
-   if (IS_4_ALIGNED(new_ESP)) {                                               \
+   if (VG_IS_4_ALIGNED(new_ESP)) {                                            \
       ALIGNED4_DIE  ( new_ESP-4 );                                            \
    } else {                                                                   \
       UNALIGNED_DIE ( new_ESP-4, 4 );                                         \
@@ -436,9 +436,9 @@ void REGPARM(1) MAC_(die_mem_stack_4)(Addr new_ESP)                           \
 void REGPARM(1) MAC_(new_mem_stack_8)(Addr new_ESP)                           \
 {                                                                             \
    PROF_EVENT(111);                                                           \
-   if (IS_8_ALIGNED(new_ESP)) {                                               \
+   if (VG_IS_8_ALIGNED(new_ESP)) {                                            \
       ALIGNED8_NEW  ( new_ESP );                                              \
-   } else if (IS_4_ALIGNED(new_ESP)) {                                        \
+   } else if (VG_IS_4_ALIGNED(new_ESP)) {                                     \
       ALIGNED4_NEW  ( new_ESP   );                                            \
       ALIGNED4_NEW  ( new_ESP+4 );                                            \
    } else {                                                                   \
@@ -449,9 +449,9 @@ void REGPARM(1) MAC_(new_mem_stack_8)(Addr new_ESP)                           \
 void REGPARM(1) MAC_(die_mem_stack_8)(Addr new_ESP)                           \
 {                                                                             \
    PROF_EVENT(121);                                                           \
-   if (IS_8_ALIGNED(new_ESP)) {                                               \
+   if (VG_IS_8_ALIGNED(new_ESP)) {                                            \
       ALIGNED8_DIE  ( new_ESP-8 );                                            \
-   } else if (IS_4_ALIGNED(new_ESP)) {                                        \
+   } else if (VG_IS_4_ALIGNED(new_ESP)) {                                     \
       ALIGNED4_DIE  ( new_ESP-8 );                                            \
       ALIGNED4_DIE  ( new_ESP-4 );                                            \
    } else {                                                                   \
@@ -462,10 +462,10 @@ void REGPARM(1) MAC_(die_mem_stack_8)(Addr new_ESP)                           \
 void REGPARM(1) MAC_(new_mem_stack_12)(Addr new_ESP)                          \
 {                                                                             \
    PROF_EVENT(112);                                                           \
-   if (IS_8_ALIGNED(new_ESP)) {                                               \
+   if (VG_IS_8_ALIGNED(new_ESP)) {                                            \
       ALIGNED8_NEW  ( new_ESP   );                                            \
       ALIGNED4_NEW  ( new_ESP+8 );                                            \
-   } else if (IS_4_ALIGNED(new_ESP)) {                                        \
+   } else if (VG_IS_4_ALIGNED(new_ESP)) {                                     \
       ALIGNED4_NEW  ( new_ESP   );                                            \
       ALIGNED8_NEW  ( new_ESP+4 );                                            \
    } else {                                                                   \
@@ -477,10 +477,10 @@ void REGPARM(1) MAC_(die_mem_stack_12)(Addr new_ESP)                          \
 {                                                                             \
    PROF_EVENT(122);                                                           \
    /* Note the -12 in the test */                                             \
-   if (IS_8_ALIGNED(new_ESP-12)) {                                            \
+   if (VG_IS_8_ALIGNED(new_ESP-12)) {                                         \
       ALIGNED8_DIE  ( new_ESP-12 );                                           \
       ALIGNED4_DIE  ( new_ESP-4  );                                           \
-   } else if (IS_4_ALIGNED(new_ESP)) {                                        \
+   } else if (VG_IS_4_ALIGNED(new_ESP)) {                                     \
       ALIGNED4_DIE  ( new_ESP-12 );                                           \
       ALIGNED8_DIE  ( new_ESP-8  );                                           \
    } else {                                                                   \
@@ -491,10 +491,10 @@ void REGPARM(1) MAC_(die_mem_stack_12)(Addr new_ESP)                          \
 void REGPARM(1) MAC_(new_mem_stack_16)(Addr new_ESP)                          \
 {                                                                             \
    PROF_EVENT(113);                                                           \
-   if (IS_8_ALIGNED(new_ESP)) {                                               \
+   if (VG_IS_8_ALIGNED(new_ESP)) {                                            \
       ALIGNED8_NEW  ( new_ESP   );                                            \
       ALIGNED8_NEW  ( new_ESP+8 );                                            \
-   } else if (IS_4_ALIGNED(new_ESP)) {                                        \
+   } else if (VG_IS_4_ALIGNED(new_ESP)) {                                     \
       ALIGNED4_NEW  ( new_ESP    );                                           \
       ALIGNED8_NEW  ( new_ESP+4  );                                           \
       ALIGNED4_NEW  ( new_ESP+12 );                                           \
@@ -506,10 +506,10 @@ void REGPARM(1) MAC_(new_mem_stack_16)(Addr new_ESP)                          \
 void REGPARM(1) MAC_(die_mem_stack_16)(Addr new_ESP)                          \
 {                                                                             \
    PROF_EVENT(123);                                                           \
-   if (IS_8_ALIGNED(new_ESP)) {                                               \
+   if (VG_IS_8_ALIGNED(new_ESP)) {                                            \
       ALIGNED8_DIE  ( new_ESP-16 );                                           \
       ALIGNED8_DIE  ( new_ESP-8  );                                           \
-   } else if (IS_4_ALIGNED(new_ESP)) {                                        \
+   } else if (VG_IS_4_ALIGNED(new_ESP)) {                                     \
       ALIGNED4_DIE  ( new_ESP-16 );                                           \
       ALIGNED8_DIE  ( new_ESP-12 );                                           \
       ALIGNED4_DIE  ( new_ESP-4  );                                           \
@@ -521,12 +521,12 @@ void REGPARM(1) MAC_(die_mem_stack_16)(Addr new_ESP)                          \
 void REGPARM(1) MAC_(new_mem_stack_32)(Addr new_ESP)                          \
 {                                                                             \
    PROF_EVENT(114);                                                           \
-   if (IS_8_ALIGNED(new_ESP)) {                                               \
+   if (VG_IS_8_ALIGNED(new_ESP)) {                                            \
       ALIGNED8_NEW  ( new_ESP    );                                           \
       ALIGNED8_NEW  ( new_ESP+8  );                                           \
       ALIGNED8_NEW  ( new_ESP+16 );                                           \
       ALIGNED8_NEW  ( new_ESP+24 );                                           \
-   } else if (IS_4_ALIGNED(new_ESP)) {                                        \
+   } else if (VG_IS_4_ALIGNED(new_ESP)) {                                     \
       ALIGNED4_NEW  ( new_ESP    );                                           \
       ALIGNED8_NEW  ( new_ESP+4  );                                           \
       ALIGNED8_NEW  ( new_ESP+12 );                                           \
@@ -540,12 +540,12 @@ void REGPARM(1) MAC_(new_mem_stack_32)(Addr new_ESP)                          \
 void REGPARM(1) MAC_(die_mem_stack_32)(Addr new_ESP)                          \
 {                                                                             \
    PROF_EVENT(124);                                                           \
-   if (IS_8_ALIGNED(new_ESP)) {                                               \
+   if (VG_IS_8_ALIGNED(new_ESP)) {                                            \
       ALIGNED8_DIE  ( new_ESP-32 );                                           \
       ALIGNED8_DIE  ( new_ESP-24 );                                           \
       ALIGNED8_DIE  ( new_ESP-16 );                                           \
       ALIGNED8_DIE  ( new_ESP- 8 );                                           \
-   } else if (IS_4_ALIGNED(new_ESP)) {                                        \
+   } else if (VG_IS_4_ALIGNED(new_ESP)) {                                     \
       ALIGNED4_DIE  ( new_ESP-32 );                                           \
       ALIGNED8_DIE  ( new_ESP-28 );                                           \
       ALIGNED8_DIE  ( new_ESP-20 );                                           \

diff --git a/memcheck/mc_main.c b/memcheck/mc_main.c
index 732707072f7dd09204b28a7f93fa67da8b705dd8..d15780b3190d1162e34b73a370cb1375ed778e8c 100644 (file)
--- a/memcheck/mc_main.c
+++ b/memcheck/mc_main.c
@@ -260,7 +260,7 @@ static __inline__ UChar get_abits4_ALIGNED ( Addr a )
    UChar   abits8;
    PROF_EVENT(24);
 #  ifdef VG_DEBUG_MEMORY
-   tl_assert(IS_4_ALIGNED(a));
+   tl_assert(VG_IS_4_ALIGNED(a));
 #  endif
    sm     = primary_map[PM_IDX(a)];
    sm_off = SM_OFF(a);
@@ -276,7 +276,7 @@ static UInt __inline__ get_vbytes4_ALIGNED ( Addr a )
    UInt    sm_off = SM_OFF(a);
    PROF_EVENT(25);
 #  ifdef VG_DEBUG_MEMORY
-   tl_assert(IS_4_ALIGNED(a));
+   tl_assert(VG_IS_4_ALIGNED(a));
 #  endif
    return ((UInt*)(sm->vbyte))[sm_off >> 2];
 }
@@ -291,7 +291,7 @@ static void __inline__ set_vbytes4_ALIGNED ( Addr a, UInt vbytes )
    sm_off = SM_OFF(a);
    PROF_EVENT(23);
 #  ifdef VG_DEBUG_MEMORY
-   tl_assert(IS_4_ALIGNED(a));
+   tl_assert(VG_IS_4_ALIGNED(a));
 #  endif
    ((UInt*)(sm->vbyte))[sm_off >> 2] = vbytes;
 }
@@ -875,7 +875,7 @@ ULong MC_(helperc_LOADV8) ( Addr a )
 #  ifdef VG_DEBUG_MEMORY
    return mc_rd_V8_SLOWLY(a);
 #  else
-   if (IS_8_ALIGNED(a)) {
+   if (VG_IS_8_ALIGNED(a)) {
       UInt    sec_no = shiftRight16(a) & 0xFFFF;
       SecMap* sm     = primary_map[sec_no];
       UInt    a_off  = (SM_OFF(a)) >> 3;
@@ -892,7 +892,7 @@ ULong MC_(helperc_LOADV8) ( Addr a )
       }
    }
    else
-   if (IS_4_ALIGNED(a)) {
+   if (VG_IS_4_ALIGNED(a)) {
       /* LITTLE-ENDIAN */
       UInt vLo =  MC_(helperc_LOADV4)(a+0);
       UInt vHi =  MC_(helperc_LOADV4)(a+4);
@@ -909,7 +909,7 @@ void MC_(helperc_STOREV8) ( Addr a, ULong vbytes )
 #  ifdef VG_DEBUG_MEMORY
    mc_wr_V8_SLOWLY(a, vbytes);
 #  else
-   if (IS_8_ALIGNED(a)) {
+   if (VG_IS_8_ALIGNED(a)) {
       UInt    sec_no = shiftRight16(a) & 0xFFFF;
       SecMap* sm     = primary_map[sec_no];
       UInt    a_off  = (SM_OFF(a)) >> 3;
@@ -927,7 +927,7 @@ void MC_(helperc_STOREV8) ( Addr a, ULong vbytes )
       return;
    }
    else
-   if (IS_4_ALIGNED(a)) {
+   if (VG_IS_4_ALIGNED(a)) {
       UInt vHi = (UInt)(vbytes >> 32);
       UInt vLo = (UInt)vbytes;
       /* LITTLE-ENDIAN */
@@ -1440,7 +1440,7 @@ static Int mc_get_or_set_vbits_for_client (
    UInt* vbitsP = NULL; /* ditto */
 
    /* Check alignment of args. */
-   if (!(IS_4_ALIGNED(data) && IS_4_ALIGNED(vbits)))
+   if (!(VG_IS_4_ALIGNED(data) && VG_IS_4_ALIGNED(vbits)))
       return 2;
    if ((size & 3) != 0)
       return 2;
@@ -1517,7 +1517,7 @@ Bool mc_is_valid_address ( Addr a )
 {
    UInt vbytes;
    UChar abits;
-   tl_assert(IS_4_ALIGNED(a));
+   tl_assert(VG_IS_4_ALIGNED(a));
    abits  = get_abits4_ALIGNED(a);
    vbytes = get_vbytes4_ALIGNED(a);
    if (abits == VGM_NIBBLE_VALID && vbytes == VGM_WORD_VALID) {