arm64: dts: rockchip: Add rk3588 based Radxa CM5

Add initial support for the Radxa Compute Module 5 (CM5). The CM5 uses a
proprietary connector.

Specification:
- Rockchip RK3588
- Up to 32 GB LPDDR4X
- Up to 128 GB eMMC
- 1x HDMI TX up to 8k@60 hz
- 1x eDP TX up to 4k@60 hz
- Gigabit Ethernet PHY

Signed-off-by: Joseph Kogut <joseph.kogut@gmail.com>
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://patch.msgid.link/20251205120703.14721-3-naoki@radxa.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi
new file mode 100644 (file)
index 0000000..d307e19
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi
@@ -0,0 +1,280 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2025 Joseph Kogut <joseph.kogut@gmail.com>
+ */
+
+/*
+ * CM5 data sheet
+ * https://dl.radxa.com/cm5/v2210/radxa_cm5_v2210_schematic.pdf
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/soc/rockchip,vop2.h>
+#include <dt-bindings/usb/pd.h>
+
+/ {
+       compatible = "radxa,cm5", "rockchip,rk3588s";
+
+       aliases {
+               mmc0 = &sdhci;
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               led_sys: led-0 {
+                       color = <LED_COLOR_ID_BLUE>;
+                       default-state = "on";
+                       function = LED_FUNCTION_HEARTBEAT;
+                       gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
+                       linux,default-trigger = "heartbeat";
+               };
+       };
+};
+
+&cpu_b0 {
+       cpu-supply = <&vdd_cpu_big0_s0>;
+};
+
+&cpu_b1 {
+       cpu-supply = <&vdd_cpu_big0_s0>;
+};
+
+&cpu_b2 {
+       cpu-supply = <&vdd_cpu_big1_s0>;
+};
+
+&cpu_b3 {
+       cpu-supply = <&vdd_cpu_big1_s0>;
+};
+
+&cpu_l0 {
+       cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l1 {
+       cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l2 {
+       cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l3 {
+       cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&gmac1 {
+       clock_in_out = "output";
+       phy-handle = <&rgmii_phy1>;
+       phy-mode = "rgmii-id";
+       phy-supply = <&vcc_3v3_s0>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&gmac1_miim
+                    &gmac1_tx_bus2
+                    &gmac1_rx_bus2
+                    &gmac1_rgmii_clk
+                    &gmac1_rgmii_bus
+                    &gmac1_clkinout>;
+};
+
+&gpu {
+       mali-supply = <&vdd_gpu_s0>;
+       status = "okay";
+};
+
+&i2c0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&i2c0m2_xfer>;
+       status = "okay";
+
+       vdd_cpu_big0_s0: regulator@42 {
+               compatible = "rockchip,rk8602";
+               reg = <0x42>;
+               fcs,suspend-voltage-selector = <1>;
+               regulator-name = "vdd_cpu_big0_s0";
+               regulator-always-on;
+               regulator-boot-on;
+               regulator-min-microvolt = <550000>;
+               regulator-max-microvolt = <1050000>;
+               regulator-ramp-delay = <2300>;
+               vin-supply = <&vcc5v0_sys>;
+
+               regulator-state-mem {
+                       regulator-off-in-suspend;
+               };
+       };
+
+       vdd_cpu_big1_s0: regulator@43 {
+               compatible = "rockchip,rk8602";
+               reg = <0x43>;
+               fcs,suspend-voltage-selector = <1>;
+               regulator-name = "vdd_cpu_big1_s0";
+               regulator-always-on;
+               regulator-boot-on;
+               regulator-min-microvolt = <550000>;
+               regulator-max-microvolt = <1050000>;
+               regulator-ramp-delay = <2300>;
+               vin-supply = <&vcc5v0_sys>;
+
+               regulator-state-mem {
+                       regulator-off-in-suspend;
+               };
+       };
+};
+
+&mdio1 {
+       rgmii_phy1: phy@1 {
+               compatible = "ethernet-phy-ieee802.3-c22";
+               reg = <0x1>;
+       };
+};
+
+&pd_gpu {
+       domain-supply = <&vdd_gpu_s0>;
+};
+
+&sdhci {
+       bus-width = <8>;
+       no-sdio;
+       no-sd;
+       non-removable;
+       max-frequency = <200000000>;
+       mmc-hs400-1_8v;
+       mmc-hs400-enhanced-strobe;
+       mmc-hs200-1_8v;
+       status = "okay";
+};
+
+&spi2 {
+       assigned-clocks = <&cru CLK_SPI2>;
+       assigned-clock-rates = <200000000>;
+       num-cs = <1>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
+       status = "okay";
+
+       pmic@0 {
+               compatible = "rockchip,rk806";
+               reg = <0x0>;
+               interrupt-parent = <&gpio0>;
+               interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
+                           <&rk806_dvs2_null>, <&rk806_dvs3_null>;
+               spi-max-frequency = <1000000>;
+               system-power-controller;
+
+               vcc1-supply = <&vcc5v0_sys>;
+               vcc2-supply = <&vcc5v0_sys>;
+               vcc3-supply = <&vcc5v0_sys>;
+               vcc4-supply = <&vcc5v0_sys>;
+               vcc5-supply = <&vcc5v0_sys>;
+               vcc6-supply = <&vcc5v0_sys>;
+               vcc7-supply = <&vcc5v0_sys>;
+               vcc8-supply = <&vcc5v0_sys>;
+               vcc9-supply = <&vcc5v0_sys>;
+               vcc10-supply = <&vcc5v0_sys>;
+               vcc11-supply = <&vcc_2v0_pldo_s3>;
+               vcc12-supply = <&vcc5v0_sys>;
+               vcc13-supply = <&vdd2_ddr_s3>;
+               vcc14-supply = <&vdd2_ddr_s3>;
+               vcca-supply = <&vcc5v0_sys>;
+
+               gpio-controller;
+               #gpio-cells = <2>;
+
+               rk806_dvs1_null: dvs1-null-pins {
+                       pins = "gpio_pwrctrl1";
+                       function = "pin_fun0";
+               };
+
+               rk806_dvs2_null: dvs2-null-pins {
+                       pins = "gpio_pwrctrl2";
+                       function = "pin_fun0";
+               };
+
+               rk806_dvs3_null: dvs3-null-pins {
+                       pins = "gpio_pwrctrl3";
+                       function = "pin_fun0";
+               };
+
+               regulators {
+                       vdd_gpu_s0: dcdc-reg1 {
+                               regulator-name = "vdd_gpu_s0";
+                               regulator-boot-on;
+                               regulator-enable-ramp-delay = <400>;
+                               regulator-min-microvolt = <550000>;
+                               regulator-max-microvolt = <950000>;
+                               regulator-ramp-delay = <12500>;
+
+                               regulator-state-mem {
+                                       regulator-off-in-suspend;
+                               };
+                       };
+
+                       vdd_cpu_lit_s0: dcdc-reg2 {
+                               regulator-name = "vdd_cpu_lit_s0";
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-min-microvolt = <550000>;
+                               regulator-max-microvolt = <950000>;
+                               regulator-ramp-delay = <12500>;
+
+                               regulator-state-mem {
+                                       regulator-off-in-suspend;
+                               };
+                       };
+
+                       vccio_sd_s0: pldo-reg5 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-name = "vccio_sd_s0";
+
+                               regulator-state-mem {
+                                       regulator-off-in-suspend;
+                               };
+                       };
+
+                       vdd2_ddr_s3: dcdc-reg6 {
+                               regulator-name = "vdd2_ddr_s3";
+                               regulator-always-on;
+                               regulator-boot-on;
+
+                               regulator-state-mem {
+                                       regulator-on-in-suspend;
+                               };
+                       };
+
+                       vcc_2v0_pldo_s3: dcdc-reg7 {
+                               regulator-name = "vdd_2v0_pldo_s3";
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-min-microvolt = <2000000>;
+                               regulator-max-microvolt = <2000000>;
+                               regulator-ramp-delay = <12500>;
+
+                               regulator-state-mem {
+                                       regulator-on-in-suspend;
+                                       regulator-suspend-microvolt = <2000000>;
+                               };
+                       };
+
+                       vcc_3v3_s3: dcdc-reg8 {
+                               regulator-name = "vcc_3v3_s3";
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-min-microvolt = <3300000>;
+                               regulator-max-microvolt = <3300000>;
+
+                               regulator-state-mem {
+                                       regulator-on-in-suspend;
+                                       regulator-suspend-microvolt = <3300000>;
+                               };
+                       };
+               };
+       };
+};