intel_idle: add Granite Rapids Xeon support

Add Granite Rapids Xeon C-states, which are C1, C1E, C6, and C6P.

Comparing to previous Xeon Generations (e.g., Emerald Rapids), C6
requests end up only in core C6 state, and no package C-state promotion
takes place even if all cores in the package are in core C6.

C6P requests also end up in core C6, but if all cores have requested
C6P, the SoC will enter the package C6 state.

Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Link: https://patch.msgid.link/20240806160310.3719205-1-artem.bityutskiy@linux.intel.com
[ rjw: Changelog edits ]
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c
index 9aab7abc2ae90ead215ba31da9ae8e6efd56dbd9..e20f57ac307ea6e567af2b1c1c56dd08c463a804 100644 (file)
--- a/drivers/idle/intel_idle.c
+++ b/drivers/idle/intel_idle.c
@@ -1022,6 +1022,45 @@ static struct cpuidle_state spr_cstates[] __initdata = {
                .enter = NULL }
 };
 
+static struct cpuidle_state gnr_cstates[] __initdata = {
+       {
+               .name = "C1",
+               .desc = "MWAIT 0x00",
+               .flags = MWAIT2flg(0x00),
+               .exit_latency = 1,
+               .target_residency = 1,
+               .enter = &intel_idle,
+               .enter_s2idle = intel_idle_s2idle, },
+       {
+               .name = "C1E",
+               .desc = "MWAIT 0x01",
+               .flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_ALWAYS_ENABLE,
+               .exit_latency = 4,
+               .target_residency = 4,
+               .enter = &intel_idle,
+               .enter_s2idle = intel_idle_s2idle, },
+       {
+               .name = "C6",
+               .desc = "MWAIT 0x20",
+               .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED |
+                                          CPUIDLE_FLAG_INIT_XSTATE,
+               .exit_latency = 170,
+               .target_residency = 650,
+               .enter = &intel_idle,
+               .enter_s2idle = intel_idle_s2idle, },
+       {
+               .name = "C6P",
+               .desc = "MWAIT 0x21",
+               .flags = MWAIT2flg(0x21) | CPUIDLE_FLAG_TLB_FLUSHED |
+                                          CPUIDLE_FLAG_INIT_XSTATE,
+               .exit_latency = 210,
+               .target_residency = 1000,
+               .enter = &intel_idle,
+               .enter_s2idle = intel_idle_s2idle, },
+       {
+               .enter = NULL }
+};
+
 static struct cpuidle_state atom_cstates[] __initdata = {
        {
                .name = "C1E",
@@ -1453,6 +1492,12 @@ static const struct idle_cpu idle_cpu_spr __initconst = {
        .use_acpi = true,
 };
 
+static const struct idle_cpu idle_cpu_gnr __initconst = {
+       .state_table = gnr_cstates,
+       .disable_promotion_to_c1e = true,
+       .use_acpi = true,
+};
+
 static const struct idle_cpu idle_cpu_avn __initconst = {
        .state_table = avn_cstates,
        .disable_promotion_to_c1e = true,
@@ -1533,6 +1578,7 @@ static const struct x86_cpu_id intel_idle_ids[] __initconst = {
        X86_MATCH_VFM(INTEL_ATOM_GRACEMONT,     &idle_cpu_gmt),
        X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X,   &idle_cpu_spr),
        X86_MATCH_VFM(INTEL_EMERALDRAPIDS_X,    &idle_cpu_spr),
+       X86_MATCH_VFM(INTEL_GRANITERAPIDS_X,    &idle_cpu_gnr),
        X86_MATCH_VFM(INTEL_XEON_PHI_KNL,       &idle_cpu_knl),
        X86_MATCH_VFM(INTEL_XEON_PHI_KNM,       &idle_cpu_knl),
        X86_MATCH_VFM(INTEL_ATOM_GOLDMONT,      &idle_cpu_bxt),