[GDB] Zero-extend 16-bit segment registers

When the 16-bit segment registers are accessed using 32-bit instructions
the high order bytes are undefined on older CPUs.  We now explicitly
zero the high order bytes when snapshotting the CPU state.  This ensures
that the GDB stub reports consistent values for the segment registers.

diff --git a/src/arch/i386/core/gdbidt.S b/src/arch/i386/core/gdbidt.S
index a49492328bcc47322c4dcafca761b93bd6539ca4..860f7b01fcf6e6b762664e951a3b77f532fa12e0 100644 (file)
--- a/src/arch/i386/core/gdbidt.S
+++ b/src/arch/i386/core/gdbidt.S
@@ -163,12 +163,18 @@ int_page_fault:
 #define IH_OFFSET_FLUX_END ( IH_OFFSET_END - 20 )
 do_interrupt:
        /* Store CPU state in GDB register snapshot */
-       pushl   %gs
-       pushl   %fs
-       pushl   %es
-       pushl   %ds
-       pushl   %ss
-       pushl   IH_OFFSET_FLUX_OLD_CS(%esp)
+       pushw   $0
+       pushw   %gs
+       pushw   $0
+       pushw   %fs
+       pushw   $0
+       pushw   %es
+       pushw   $0
+       pushw   %ds
+       pushw   $0
+       pushw   %ss
+       pushw   $0
+       pushw   IH_OFFSET_FLUX_OLD_CS + 2(%esp)
        pushl   IH_OFFSET_FLUX_OLD_EFLAGS(%esp)
        pushl   IH_OFFSET_FLUX_OLD_EIP(%esp)
        pushl   %edi

diff --git a/src/tests/gdbstub_test.gdb b/src/tests/gdbstub_test.gdb
index 191799af5a2cef5ce3c9c547783c2972e54a5b6c..52aa693f260d1e1315cc08082744f61293b9c347 100755 (executable)
--- a/src/tests/gdbstub_test.gdb
+++ b/src/tests/gdbstub_test.gdb
@@ -81,13 +81,13 @@ define gpxe_test_awatch
        awatch watch_me
 
        c
-       gpxe_assert $ecx 0x600d0000 "gpxe_test_awatch"
+       gpxe_assert $ecx 0x600d0000 "gpxe_test_awatch read"
        if $ecx == 0x600d0000
                c
        end
 
        c
-       gpxe_assert $ecx 0x600d0001 "gpxe_test_awatch"
+       gpxe_assert $ecx 0x600d0001 "gpxe_test_awatch write"
        if $ecx == 0x600d0001
                c
        end