--- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
-@@ -1938,6 +1938,14 @@
+@@ -1921,6 +1921,14 @@
status = "disabled";
};
the hdptxphy0-as-dclk source I just added]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
-+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
-@@ -220,7 +220,7 @@
+--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
+@@ -334,7 +334,7 @@
};
};
Link: https://lore.kernel.org/r/717e7c9527139c3a3e5246dd367a3ad98c5c81b6.1727438777.git.geert+renesas@glider.be
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts
-+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts
-@@ -46,7 +46,7 @@
- compatible = "audio-graph-card";
- label = "rk3588-es8316";
+--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+@@ -32,7 +32,7 @@
+ "Headphones", "HPOR";
+
dais = <&i2s0_8ch_p0>;
- hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
+ hp-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&hp_detect>;
- routing = "MIC2", "Mic Jack",
+ };
the hdptxphy0-as-dclk source I just added]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
-+++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
-@@ -334,7 +334,7 @@
+--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+@@ -220,7 +220,7 @@
};
};
Link: https://lore.kernel.org/r/717e7c9527139c3a3e5246dd367a3ad98c5c81b6.1727438777.git.geert+renesas@glider.be
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
-+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
-@@ -32,7 +32,7 @@
- "Headphones", "HPOR";
-
+--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts
+@@ -46,7 +46,7 @@
+ compatible = "audio-graph-card";
+ label = "rk3588-es8316";
dais = <&i2s0_8ch_p0>;
- hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
+ hp-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&hp_detect>;
- };
+ routing = "MIC2", "Mic Jack",
+From 50decd493c8394c52d04561fe4ede34df27a46ba Mon Sep 17 00:00:00 2001
+From: Tianling Shen <cnsztl@gmail.com>
+Date: Mon, 21 Oct 2024 01:39:46 +0800
+Subject: [PATCH] arm64: dts: rockchip: Add FriendlyARM NanoPi R3S board
+
+The NanoPi R3S(as "R3S") is an open source platform with dual-Gbps
+Ethernet ports designed and developed by FriendlyElec for IoT
+applications.
+
+Specification:
+- Rockchip RK3566
+- 2GB LPDDR4X RAM
+- optional 32GB eMMC module
+- SD card slot
+- 2x 1000 Base-T
+- 3x LEDs (POWER, LAN, WAN)
+- 2x Buttons (Reset, MaskROM)
+- 1x USB 3.0 Port
+- Type-C 5V 2A Power
+
+Signed-off-by: Tianling Shen <cnsztl@gmail.com>
+Link: https://lore.kernel.org/r/20241020173946.225960-2-cnsztl@gmail.com
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+---
+ arch/arm64/boot/dts/rockchip/Makefile | 1 +
+ .../boot/dts/rockchip/rk3566-nanopi-r3s.dts | 554 ++++++++++++++++++
+ 2 files changed, 555 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts
+
+--- a/arch/arm64/boot/dts/rockchip/Makefile
++++ b/arch/arm64/boot/dts/rockchip/Makefile
+@@ -83,6 +83,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-an
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg353v.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg353vs.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg503.dtb
++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-nanopi-r3s.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-odroid-m1s.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-orangepi-3b-v1.1.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-orangepi-3b-v2.1.dtb
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts
@@ -0,0 +1,554 @@
+ * Copyright (c) 2020 Rockchip Electronics Co., Ltd.
+ *
+ * Copyright (c) 2024 FriendlyElec Computer Tech. Co., Ltd.
-+ * (http://www.friendlyelec.com)
++ * (http://www.friendlyarm.com)
+ *
+ * Copyright (c) 2024 Tianling Shen <cnsztl@gmail.com>
+ */
+#include "rk3566.dtsi"
+
+/ {
-+ model = "FriendlyElec NanoPi R3S";
++ model = "FriendlyARM NanoPi R3S";
+ compatible = "friendlyarm,nanopi-r3s", "rockchip,rk3566";
+
+ aliases {
+ ethernet0 = &gmac1;
-+ mmc0 = &sdhci;
-+ mmc1 = &sdmmc0;
++ mmc0 = &sdmmc0;
++ mmc1 = &sdhci;
+ };
+
+ chosen: chosen {
+ &gmac1m0_rx_bus2
+ &gmac1m0_rgmii_clk_level2
+ &gmac1m0_rgmii_bus_level3>;
++ snps,reset-gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
++ snps,reset-active-low;
++ /* Reset time is 20ms, 100ms for rtl8211f */
++ snps,reset-delays-us = <0 20000 100000>;
+ status = "okay";
+};
+
+ interrupts = <RK_PC3 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <ð_phy_reset_pin>;
-+ reset-assert-us = <20000>;
-+ reset-deassert-us = <100000>;
-+ reset-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
+ };
+};
+
+};
+
+&pmu_io_domains {
++ status = "okay";
+ pmuio1-supply = <&vcc3v3_pmu>;
+ pmuio2-supply = <&vcc3v3_pmu>;
+ vccio1-supply = <&vccio_acodec>;
+ vccio5-supply = <&vcc_1v8>;
+ vccio6-supply = <&vcc_3v3>;
+ vccio7-supply = <&vcc_3v3>;
-+ status = "okay";
+};
+
+&sdhci {
+ bus-width = <8>;
+ max-frequency = <200000000>;
-+ mmc-hs200-1_8v;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
+&vop_mmu {
+ status = "okay";
+};
---- a/arch/arm64/boot/dts/rockchip/Makefile
-+++ b/arch/arm64/boot/dts/rockchip/Makefile
-@@ -83,6 +83,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-an
- dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg353v.dtb
- dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg353vs.dtb
- dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg503.dtb
-+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-nanopi-r3s.dtb
- dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-odroid-m1s.dtb
- dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-orangepi-3b-v1.1.dtb
- dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-orangepi-3b-v2.1.dtb
--- /dev/null
+From b5bf84206a5c77528f9dd4cbca4e72caa063c102 Mon Sep 17 00:00:00 2001
+From: Tianling Shen <cnsztl@gmail.com>
+Date: Wed, 23 Oct 2024 03:35:26 +0800
+Subject: [PATCH] arm64: dts: rockchip: fix model name for FriendlyElec NanoPi
+ R3S
+
+Use the marketing name for model name, this matches the dt-binding.
+Also update the website url in copyright.
+
+Fixes: 50decd493c83 ("arm64: dts: rockchip: Add FriendlyARM NanoPi R3S board")
+Suggested-by: Jonas Karlman <jonas@kwiboo.se>
+Signed-off-by: Tianling Shen <cnsztl@gmail.com>
+Link: https://lore.kernel.org/r/20241022193537.1117919-2-cnsztl@gmail.com
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+---
+ arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts
+@@ -3,7 +3,7 @@
+ * Copyright (c) 2020 Rockchip Electronics Co., Ltd.
+ *
+ * Copyright (c) 2024 FriendlyElec Computer Tech. Co., Ltd.
+- * (http://www.friendlyarm.com)
++ * (http://www.friendlyelec.com)
+ *
+ * Copyright (c) 2024 Tianling Shen <cnsztl@gmail.com>
+ */
+@@ -17,7 +17,7 @@
+ #include "rk3566.dtsi"
+
+ / {
+- model = "FriendlyARM NanoPi R3S";
++ model = "FriendlyElec NanoPi R3S";
+ compatible = "friendlyarm,nanopi-r3s", "rockchip,rk3566";
+
+ aliases {
--- /dev/null
+From 82b2868937883b65732da498b26366d34db61510 Mon Sep 17 00:00:00 2001
+From: Tianling Shen <cnsztl@gmail.com>
+Date: Wed, 23 Oct 2024 03:35:27 +0800
+Subject: [PATCH] arm64: dts: rockchip: replace deprecated snps,reset props for
+ NanoPi R3S
+
+Replace deprecated snps,reset props and move them to the PHY node.
+
+Fixes: 50decd493c83 ("arm64: dts: rockchip: Add FriendlyARM NanoPi R3S board")
+Suggested-by: Jonas Karlman <jonas@kwiboo.se>
+Signed-off-by: Tianling Shen <cnsztl@gmail.com>
+Link: https://lore.kernel.org/r/20241022193537.1117919-3-cnsztl@gmail.com
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+---
+ arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts | 7 +++----
+ 1 file changed, 3 insertions(+), 4 deletions(-)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts
+@@ -149,10 +149,6 @@
+ &gmac1m0_rx_bus2
+ &gmac1m0_rgmii_clk_level2
+ &gmac1m0_rgmii_bus_level3>;
+- snps,reset-gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
+- snps,reset-active-low;
+- /* Reset time is 20ms, 100ms for rtl8211f */
+- snps,reset-delays-us = <0 20000 100000>;
+ status = "okay";
+ };
+
+@@ -414,6 +410,9 @@
+ interrupts = <RK_PC3 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <ð_phy_reset_pin>;
++ reset-assert-us = <20000>;
++ reset-deassert-us = <100000>;
++ reset-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
+ };
+ };
+
--- /dev/null
+From 17e150fdd983c7e59b9240e34a166285f3c3fb39 Mon Sep 17 00:00:00 2001
+From: Tianling Shen <cnsztl@gmail.com>
+Date: Wed, 23 Oct 2024 03:35:28 +0800
+Subject: [PATCH] arm64: dts: rockchip: sort props in pmu_io_domains node for
+ NanoPi R3S
+
+The status prop is typically the last prop.
+
+Fixes: 50decd493c83 ("arm64: dts: rockchip: Add FriendlyARM NanoPi R3S board")
+Suggested-by: Jonas Karlman <jonas@kwiboo.se>
+Signed-off-by: Tianling Shen <cnsztl@gmail.com>
+Link: https://lore.kernel.org/r/20241022193537.1117919-4-cnsztl@gmail.com
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+---
+ arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts
+@@ -476,7 +476,6 @@
+ };
+
+ &pmu_io_domains {
+- status = "okay";
+ pmuio1-supply = <&vcc3v3_pmu>;
+ pmuio2-supply = <&vcc3v3_pmu>;
+ vccio1-supply = <&vccio_acodec>;
+@@ -486,6 +485,7 @@
+ vccio5-supply = <&vcc_1v8>;
+ vccio6-supply = <&vcc_3v3>;
+ vccio7-supply = <&vcc_3v3>;
++ status = "okay";
+ };
+
+ &sdhci {
--- /dev/null
+From 1b5365034410f1ca21adadadd492b99bdf4f2c55 Mon Sep 17 00:00:00 2001
+From: Tianling Shen <cnsztl@gmail.com>
+Date: Wed, 23 Oct 2024 03:35:29 +0800
+Subject: [PATCH] arm64: dts: rockchip: enable eMMC HS200 mode for NanoPi R3S
+
+It is required to boot from eMMC without additional patch in u-boot.
+
+Fixes: 50decd493c83 ("arm64: dts: rockchip: Add FriendlyARM NanoPi R3S board")
+Suggested-by: Jonas Karlman <jonas@kwiboo.se>
+Signed-off-by: Tianling Shen <cnsztl@gmail.com>
+Link: https://lore.kernel.org/r/20241022193537.1117919-5-cnsztl@gmail.com
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+---
+ arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts
+@@ -491,6 +491,7 @@
+ &sdhci {
+ bus-width = <8>;
+ max-frequency = <200000000>;
++ mmc-hs200-1_8v;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
--- /dev/null
+From b7cd1115456d312f8c5e60c80fdc35fd35ea6eab Mon Sep 17 00:00:00 2001
+From: Tianling Shen <cnsztl@gmail.com>
+Date: Wed, 23 Oct 2024 03:35:30 +0800
+Subject: [PATCH] arm64: dts: rockchip: reorder mmc aliases for NanoPi R3S
+
+Typically any non-removable storage (emmc) is listed before removable
+storage (sd-card) options. Also U-Boot will try to override and use
+mmc0=sdhci and mmc1=sdmmc0 for all rk356x boards.
+
+Fixes: 50decd493c83 ("arm64: dts: rockchip: Add FriendlyARM NanoPi R3S board")
+Suggested-by: Jonas Karlman <jonas@kwiboo.se>
+Signed-off-by: Tianling Shen <cnsztl@gmail.com>
+Link: https://lore.kernel.org/r/20241022193537.1117919-6-cnsztl@gmail.com
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+---
+ arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts
+@@ -22,8 +22,8 @@
+
+ aliases {
+ ethernet0 = &gmac1;
+- mmc0 = &sdmmc0;
+- mmc1 = &sdhci;
++ mmc0 = &sdhci;
++ mmc1 = &sdmmc0;
+ };
+
+ chosen: chosen {
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
-@@ -632,7 +632,7 @@
+@@ -619,8 +619,7 @@
+ no-sd;
+ non-removable;
+ max-frequency = <200000000>;
+- mmc-hs400-1_8v;
+- mmc-hs400-enhanced-strobe;
++ mmc-hs200-1_8v;
+ status = "okay";
+ };
+
+@@ -632,7 +631,7 @@
disable-wp;
no-mmc;
no-sdio;
+++ /dev/null
-From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
-From: Grzegorz Sterniczuk <grzegorz@sternicz.uk>
-Date: Mon, 21 Jul 2025 23:24:11 +0200
-Subject: rockchip: fix eMMC corruption on NanoPC-T6 with A3A444 chips
-
-Some NanoPC-T6 boards with A3A444 eMMC chips experience I/O errors and
-corruption when using HS400 mode. Downgrade to HS200 mode to ensure
-stable operation.
-
-Fixes: #18844
-Signed-off-by: Grzegorz Sterniczuk <grzegorz@sternicz.uk>
----
- arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 3 +--
- 1 file changed, 1 insertion(+), 2 deletions(-)
-
---- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
-+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
-@@ -619,8 +619,7 @@
- no-sd;
- non-removable;
- max-frequency = <200000000>;
-- mmc-hs400-1_8v;
-- mmc-hs400-enhanced-strobe;
-+ mmc-hs200-1_8v;
- status = "okay";
- };
-