ctrl->bits_per_word_mask = SPI_BPW_MASK(8);
ctrl->mode_bits = SPI_RX_DUAL;
ctrl->setup = airoha_snand_setup;
- device_set_node(&ctrl->dev, dev_fwnode(dev));
err = airoha_snand_nfi_init(as_ctrl);
if (err)
struct spi_controller *host;
struct dln2_spi *dln2;
struct dln2_platform_data *pdata = dev_get_platdata(&pdev->dev);
- struct device *dev = &pdev->dev;
int ret;
host = spi_alloc_host(&pdev->dev, sizeof(*dln2));
if (!host)
return -ENOMEM;
- device_set_node(&host->dev, dev_fwnode(dev));
-
platform_set_drvdata(pdev, host);
dln2 = spi_controller_get_devdata(host);
if (!ctlr)
return -ENOMEM;
- device_set_node(&ctlr->dev, dev_fwnode(dev));
-
dws->ctlr = ctlr;
dws->dma_addr = (dma_addr_t)(dws->paddr + DW_SPI_DR);
/* make sure that the hardware is disabled */
writel(0, espi->mmio + SSPCR1);
- device_set_node(&host->dev, dev_fwnode(&pdev->dev));
error = devm_spi_register_controller(&pdev->dev, host);
if (error) {
dev_err(&pdev->dev, "failed to register SPI host\n");
return -ENOMEM;
if (fwnode) {
- device_set_node(&host->dev, fwnode);
host->use_gpio_descriptors = true;
} else {
status = spi_gpio_probe_pdata(pdev, host);
controller->auto_runtime_pm = false;
controller->max_speed_hz = LJCA_SPI_BUS_MAX_HZ;
- device_set_node(&ljca_spi->controller->dev, dev_fwnode(&auxdev->dev));
auxiliary_set_drvdata(auxdev, controller);
ret = spi_register_controller(controller);
controller->unprepare_message = loongson_spi_unprepare_message;
controller->set_cs = loongson_spi_set_cs;
controller->num_chipselect = 4;
- device_set_node(&controller->dev, dev_fwnode(dev));
dev_set_drvdata(dev, controller);
spi = spi_controller_get_devdata(controller);
host->use_gpio_descriptors = true;
host->cleanup = mpc512x_psc_spi_cleanup;
- device_set_node(&host->dev, dev_fwnode(dev));
-
tempp = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
if (IS_ERR(tempp))
return dev_err_probe(dev, PTR_ERR(tempp), "could not ioremap I/O port range\n");
host->transfer_one_message = mpc52xx_psc_spi_transfer_one_message;
host->cleanup = mpc52xx_psc_spi_cleanup;
- device_set_node(&host->dev, dev_fwnode(dev));
-
mps->psc = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
if (IS_ERR(mps->psc))
return dev_err_probe(dev, PTR_ERR(mps->psc), "could not ioremap I/O port range\n");
else
ctlr->mem_caps = &nxp_fspi_mem_caps;
- device_set_node(&ctlr->dev, fwnode);
-
ret = devm_add_action_or_reset(dev, nxp_fspi_cleanup, f);
if (ret)
return ret;
drv_data->controller_info = platform_info;
drv_data->ssp = ssp;
- device_set_node(&controller->dev, dev_fwnode(dev));
-
/* The spi->mode bits understood by this driver: */
controller->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LOOP;
ctrl->mem_ops = &rtl_snand_mem_ops;
ctrl->bits_per_word_mask = SPI_BPW_MASK(8);
ctrl->mode_bits = SPI_RX_DUAL | SPI_RX_QUAD | SPI_TX_DUAL | SPI_TX_QUAD;
- device_set_node(&ctrl->dev, dev_fwnode(dev));
return devm_spi_register_controller(dev, ctrl);
}
controller->dma_rx = NULL;
}
- device_set_node(&controller->dev, dev_fwnode(dev));
-
ret = devm_spi_register_controller(dev, controller);
if (ret)
dev_err(dev, "register controller failed\n");
controller->use_gpio_descriptors = true;
controller->target_abort = rzv2m_csi_target_abort;
- device_set_node(&controller->dev, dev_fwnode(dev));
-
ret = devm_request_irq(dev, irq, rzv2m_csi_irq_handler, 0,
dev_name(dev), csi);
if (ret)
if (!host)
return -ENOMEM;
- device_set_node(&host->dev, dev_fwnode(dev));
-
hw = spi_controller_get_devdata(host);
/* assert reset and then release */
ctlr = devm_spi_alloc_host(dev, sizeof(*pspim));
if (!ctlr)
return -ENOMEM;
- device_set_node(&ctlr->dev, dev_fwnode(dev));
ctlr->bus_num = pdev->id;
ctlr->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST;
ctlr->auto_runtime_pm = true;
priv->vdev = vdev;
vdev->priv = priv;
- device_set_node(&ctrl->dev, dev_fwnode(&vdev->dev));
-
dev_set_drvdata(&vdev->dev, ctrl);
virtio_spi_read_config(vdev);