arm: treat -mcpu/arch=iwmmxt{,2} like XScale

Treat options that select iwmmxt variants as we would for xscale.  We
leave the feature bits in for now, since they are still needed
elsewhere, but they are never enabled.

Also remove the remaining testsuite framework support for iwmmxt,
since this will never trigger now.

gcc/

	* config/arm/arm-cpus.in (arch iwmmxt): treat in the same
	way as we would treat XScale.
	(arch iwmmxt2): Likewise.
	(cpu xscale): Add aliases for iwmmxt and iwmmxt2.
	(cpu iwmmxt): Delete.
	(cpu iwmmxt2): Delete.
	* config/arm/arm-generic.md (load_ldsched_xscale): Remove references
	to iwmmxt.
	(load_ldsched): Likewise.
	* config/arm/arm-tables.opt: Regenerated.
	* config/arm/arm-tune.md: Regenerated.
	* doc/sourcebuild.texi (arm_iwmmxt_ok): Delete.

gcc/testsuite/ChangeLog:

	* gcc.target/arm/ivopts.c: Remove test for iwmmxt
	* lib/target-supports.exp
	(check_effective_target_arm_iwmmxt_ok): Delete.

diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in
index 1939d55b9fdbfe0b9d42b9ff40836753a4899e1e..b34c441ec76dfd87c1c35a8892d562cf80a28019 100644 (file)
--- a/gcc/config/arm/arm-cpus.in
+++ b/gcc/config/arm/arm-cpus.in
@@ -778,18 +778,19 @@ begin arch armv9-a
  option bf16 add bf16 FP_ARMv8 DOTPROD
 end arch armv9-a
 
+# We no-longer support the iwmmxt{,2} extensions, so treat these like xscale.
 begin arch iwmmxt
- tune for iwmmxt
+ tune for xscale
  tune flags LDSCHED STRONG XSCALE
  base 5TE
- isa ARMv5te xscale iwmmxt
+ isa ARMv5te xscale
 end arch iwmmxt
 
 begin arch iwmmxt2
- tune for iwmmxt2
+ tune for xscale
  tune flags LDSCHED STRONG XSCALE
  base 5TE
- isa ARMv5te xscale iwmmxt iwmmxt2
+ isa ARMv5te xscale
 end arch iwmmxt2
 
 # CPU entries
@@ -924,23 +925,12 @@ end cpu arm10e
 
 begin cpu xscale
  tune flags LDSCHED XSCALE
+ alias iwmmxt iwmmxt2
  architecture armv5te
  isa xscale
  costs xscale
 end cpu xscale
 
-begin cpu iwmmxt
- tune flags LDSCHED XSCALE
- architecture iwmmxt
- costs xscale
-end cpu iwmmxt
-
-begin cpu iwmmxt2
- tune flags LDSCHED XSCALE
- architecture iwmmxt2
- costs xscale
-end cpu iwmmxt2
-
 begin cpu fa606te
  tune flags LDSCHED
  architecture armv5te

diff --git a/gcc/config/arm/arm-generic.md b/gcc/config/arm/arm-generic.md
index c2700568c00ac9f2de4382893903c1cf59324a94..a8af0e6f2556a46a67dd2b9dd734f9e0075cb922 100644 (file)
--- a/gcc/config/arm/arm-generic.md
+++ b/gcc/config/arm/arm-generic.md
@@ -96,14 +96,14 @@
   (and (eq_attr "generic_sched" "yes")
        (and (eq_attr "ldsched" "yes") 
            (and (eq_attr "type" "load_byte,load_4")
-                (eq_attr "tune" "xscale,iwmmxt,iwmmxt2"))))
+                (eq_attr "tune" "xscale"))))
   "core")
 
 (define_insn_reservation "load_ldsched" 2
   (and (eq_attr "generic_sched" "yes")
        (and (eq_attr "ldsched" "yes") 
            (and (eq_attr "type" "load_byte,load_4")
-                (eq_attr "tune" "!xscale,iwmmxt,iwmmxt2"))))
+                (eq_attr "tune" "!xscale"))))
   "core")
 
 (define_insn_reservation "load_or_store" 2

diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt
index db7767a2d6cfc83fd86c37f3e5a7ced51ecf9633..544de84df809403c20763726ed4991af08dcf847 100644 (file)
--- a/gcc/config/arm/arm-tables.opt
+++ b/gcc/config/arm/arm-tables.opt
@@ -66,12 +66,6 @@ Enum(processor_type) String(arm10e) Value( TARGET_CPU_arm10e)
 EnumValue
 Enum(processor_type) String(xscale) Value( TARGET_CPU_xscale)
 
-EnumValue
-Enum(processor_type) String(iwmmxt) Value( TARGET_CPU_iwmmxt)
-
-EnumValue
-Enum(processor_type) String(iwmmxt2) Value( TARGET_CPU_iwmmxt2)
-
 EnumValue
 Enum(processor_type) String(fa606te) Value( TARGET_CPU_fa606te)
 

diff --git a/gcc/config/arm/arm-tune.md b/gcc/config/arm/arm-tune.md
index a04d1eeb62dd3abfb15cc1b8ac11a6e859b3047c..20b5f932344d875817cc1d924d5d3f33bc22c592 100644 (file)
--- a/gcc/config/arm/arm-tune.md
+++ b/gcc/config/arm/arm-tune.md
@@ -25,31 +25,30 @@
        fa526,fa626,arm7tdmi,
        arm710t,arm9,arm9tdmi,
        arm920t,arm10tdmi,arm9e,
-       arm10e,xscale,iwmmxt,
-       iwmmxt2,fa606te,fa626te,
-       fmp626,fa726te,arm926ejs,
-       arm1026ejs,arm1136js,arm1136jfs,
-       arm1176jzs,arm1176jzfs,mpcorenovfp,
-       mpcore,arm1156t2s,arm1156t2fs,
-       cortexm1,cortexm0,cortexm0plus,
-       cortexm1smallmultiply,cortexm0smallmultiply,cortexm0plussmallmultiply,
-       genericv7a,cortexa5,cortexa7,
-       cortexa8,cortexa9,cortexa12,
-       cortexa15,cortexa17,cortexr4,
-       cortexr4f,cortexr5,cortexr7,
-       cortexr8,cortexm7,cortexm4,
-       cortexm3,marvell_pj4,cortexa15cortexa7,
-       cortexa17cortexa7,cortexa32,cortexa35,
-       cortexa53,cortexa57,cortexa72,
-       cortexa73,exynosm1,xgene1,
-       cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,
-       cortexa73cortexa53,cortexa55,cortexa75,
-       cortexa76,cortexa76ae,cortexa77,
-       cortexa78,cortexa78ae,cortexa78c,
-       cortexa710,cortexx1,cortexx1c,
-       neoversen1,cortexa75cortexa55,cortexa76cortexa55,
-       neoversev1,neoversen2,cortexm23,
-       cortexm33,cortexm35p,cortexm52,
-       cortexm55,starmc1,cortexm85,
-       cortexr52,cortexr52plus"
+       arm10e,xscale,fa606te,
+       fa626te,fmp626,fa726te,
+       arm926ejs,arm1026ejs,arm1136js,
+       arm1136jfs,arm1176jzs,arm1176jzfs,
+       mpcorenovfp,mpcore,arm1156t2s,
+       arm1156t2fs,cortexm1,cortexm0,
+       cortexm0plus,cortexm1smallmultiply,cortexm0smallmultiply,
+       cortexm0plussmallmultiply,genericv7a,cortexa5,
+       cortexa7,cortexa8,cortexa9,
+       cortexa12,cortexa15,cortexa17,
+       cortexr4,cortexr4f,cortexr5,
+       cortexr7,cortexr8,cortexm7,
+       cortexm4,cortexm3,marvell_pj4,
+       cortexa15cortexa7,cortexa17cortexa7,cortexa32,
+       cortexa35,cortexa53,cortexa57,
+       cortexa72,cortexa73,exynosm1,
+       xgene1,cortexa57cortexa53,cortexa72cortexa53,
+       cortexa73cortexa35,cortexa73cortexa53,cortexa55,
+       cortexa75,cortexa76,cortexa76ae,
+       cortexa77,cortexa78,cortexa78ae,
+       cortexa78c,cortexa710,cortexx1,
+       cortexx1c,neoversen1,cortexa75cortexa55,
+       cortexa76cortexa55,neoversev1,neoversen2,
+       cortexm23,cortexm33,cortexm35p,
+       cortexm52,cortexm55,starmc1,
+       cortexm85,cortexr52,cortexr52plus"
        (const (symbol_ref "((enum attr_tune) arm_tune)")))

diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi
index 65eeeccb264caba129c3e243f3778666c217b98e..1c718c414129d76d0cbd5489709ffe55c25115b9 100644 (file)
--- a/gcc/doc/sourcebuild.texi
+++ b/gcc/doc/sourcebuild.texi
@@ -2042,10 +2042,6 @@ ARM target uses emulated floating point operations.
 ARM target supports @code{-mfpu=vfp -mfloat-abi=hard}.
 Some multilibs may be incompatible with these options.
 
-@item arm_iwmmxt_ok
-ARM target supports @code{-mcpu=iwmmxt}.
-Some multilibs may be incompatible with this option.
-
 @item arm_neon
 ARM target supports generating NEON instructions.
 

diff --git a/gcc/testsuite/gcc.target/arm/ivopts.c b/gcc/testsuite/gcc.target/arm/ivopts.c
index 582fdab7836d0b0fca332722cd6de4f21d60b2d0..6e3e74c2d567452d5880ab5c5c4ab1563359f0fe 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/ivopts.c
+++ b/gcc/testsuite/gcc.target/arm/ivopts.c
@@ -12,5 +12,4 @@ tr5 (short array[], int n)
 
 /* { dg-final { scan-tree-dump-times "PHI <" 1 "ivopts"} } */
 /* { dg-final { object-size text <= 20 { target { arm_thumb2_no_arm_v8_1m_lob } } } } */
-/* { dg-final { object-size text <= 32 { target { arm_nothumb && { ! arm_iwmmxt_ok } } } } } */
-/* { dg-final { object-size text <= 36 { target { arm_nothumb && arm_iwmmxt_ok }  } } } */
+/* { dg-final { object-size text <= 32 { target { arm_nothumb } } } } */

diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 24d0b3d08e340cf7c362a2e0cd57e5f631c62c25..e0495d8437c939bb890fcaf704dee715695510d2 100644 (file)
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -7436,19 +7436,6 @@ proc check_effective_target_arm_softfloat { } {
     }]
 }
 
-# Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
-# Some multilibs may be incompatible with this option.
-
-proc check_effective_target_arm_iwmmxt_ok { } {
-    if { [check_effective_target_arm32] } {
-       return [check_no_compiler_messages arm_iwmmxt_ok object {
-           int dummy;
-       } "-mcpu=iwmmxt"]
-    } else {
-       return 0
-    }
-}
-
 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
 # for an ARM target.
 proc check_effective_target_arm_prefer_ldrd_strd { } {