]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/amd/display: Clear DPP 3DLUT Cap
authorRyan Seto <ryanseto@amd.com>
Tue, 27 May 2025 18:51:10 +0000 (14:51 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 18 Jun 2025 16:19:16 +0000 (12:19 -0400)
[WHY & HOW]
Clear DPP 3DLUT Cap flag on ASICs that do not use it

Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Ryan Seto <ryanseto@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dc.h
drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

index fc36beb66d49f3aee4406da8a4e2cbd74d98f309..4f162905475d178acd9efe00953f86cbff9d6d77 100644 (file)
@@ -245,6 +245,7 @@ struct mpc_color_caps {
        struct rom_curve_caps ogam_rom_caps;
        struct lut3d_caps mcm_3d_lut_caps;
        struct lut3d_caps rmcm_3d_lut_caps;
+       bool preblend;
 };
 
 /**
index 363e4a094534d44dd1fc7b7ca05928fd3008490e..d2d321eec2218615ce9ce8f18bd0b6820b7d7d3e 100644 (file)
@@ -2251,7 +2251,7 @@ static bool dcn32_resource_construct(
        dc->caps.color.dpp.gamma_corr = 1;
        dc->caps.color.dpp.dgam_rom_for_yuv = 0;
 
-       dc->caps.color.dpp.hw_3d_lut = 1;
+       dc->caps.color.dpp.hw_3d_lut = 0;
        dc->caps.color.dpp.ogam_ram = 0;  // no OGAM in DPP since DCN1
        // no OGAM ROM on DCN2 and later ASICs
        dc->caps.color.dpp.ogam_rom_caps.srgb = 0;
@@ -2270,6 +2270,7 @@ static bool dcn32_resource_construct(
        dc->caps.color.mpc.ogam_rom_caps.pq = 0;
        dc->caps.color.mpc.ogam_rom_caps.hlg = 0;
        dc->caps.color.mpc.ocsc = 1;
+       dc->caps.color.mpc.preblend = true;
 
        /* Use pipe context based otg sync logic */
        dc->config.use_pipe_ctx_sync_logic = true;
index ae5a58a48d73ee958ecf620ca821664c4475d1f9..c2f12030928f32b18cf11b6b791b42bdc9e683b2 100644 (file)
@@ -1755,8 +1755,8 @@ static bool dcn321_resource_construct(
        dc->caps.color.dpp.gamma_corr = 1;
        dc->caps.color.dpp.dgam_rom_for_yuv = 0;
 
-       dc->caps.color.dpp.hw_3d_lut = 1;
-       dc->caps.color.dpp.ogam_ram = 1;
+       dc->caps.color.dpp.hw_3d_lut = 0;
+       dc->caps.color.dpp.ogam_ram = 0;
        // no OGAM ROM on DCN2 and later ASICs
        dc->caps.color.dpp.ogam_rom_caps.srgb = 0;
        dc->caps.color.dpp.ogam_rom_caps.bt2020 = 0;
@@ -1774,6 +1774,7 @@ static bool dcn321_resource_construct(
        dc->caps.color.mpc.ogam_rom_caps.pq = 0;
        dc->caps.color.mpc.ogam_rom_caps.hlg = 0;
        dc->caps.color.mpc.ocsc = 1;
+       dc->caps.color.mpc.preblend = true;
 
        /* Use pipe context based otg sync logic */
        dc->config.use_pipe_ctx_sync_logic = true;
index 1f20069018ca4db39e11b6c15fe5de0b1adb3e41..353189ac0d530d7421dda85fc6ba2215111d7afc 100644 (file)
@@ -1874,7 +1874,7 @@ static bool dcn35_resource_construct(
        dc->caps.color.dpp.gamma_corr = 1;
        dc->caps.color.dpp.dgam_rom_for_yuv = 0;
 
-       dc->caps.color.dpp.hw_3d_lut = 1;
+       dc->caps.color.dpp.hw_3d_lut = 0;
        dc->caps.color.dpp.ogam_ram = 0;  // no OGAM in DPP since DCN1
        // no OGAM ROM on DCN301
        dc->caps.color.dpp.ogam_rom_caps.srgb = 0;
@@ -1893,6 +1893,7 @@ static bool dcn35_resource_construct(
        dc->caps.color.mpc.ogam_rom_caps.pq = 0;
        dc->caps.color.mpc.ogam_rom_caps.hlg = 0;
        dc->caps.color.mpc.ocsc = 1;
+       dc->caps.color.mpc.preblend = true;
 
        dc->caps.num_of_host_routers = 2;
        dc->caps.num_of_dpias_per_host_router = 2;
index 6266fc77c7ebe88f1a489cddc4f4670718764b28..f9fd3656713089df184b1238cf97c9d4a6c90259 100644 (file)
@@ -1846,7 +1846,7 @@ static bool dcn351_resource_construct(
        dc->caps.color.dpp.gamma_corr = 1;
        dc->caps.color.dpp.dgam_rom_for_yuv = 0;
 
-       dc->caps.color.dpp.hw_3d_lut = 1;
+       dc->caps.color.dpp.hw_3d_lut = 0;
        dc->caps.color.dpp.ogam_ram = 0;  // no OGAM in DPP since DCN1
        // no OGAM ROM on DCN301
        dc->caps.color.dpp.ogam_rom_caps.srgb = 0;
@@ -1865,6 +1865,7 @@ static bool dcn351_resource_construct(
        dc->caps.color.mpc.ogam_rom_caps.pq = 0;
        dc->caps.color.mpc.ogam_rom_caps.hlg = 0;
        dc->caps.color.mpc.ocsc = 1;
+       dc->caps.color.mpc.preblend = true;
 
        dc->caps.num_of_host_routers = 2;
        dc->caps.num_of_dpias_per_host_router = 2;
index 10d3182b3058f454e0ae9efa68298f0d3f8af343..37b18575c376ee0b0a95eaa212d62a4a326c9125 100644 (file)
@@ -1847,7 +1847,7 @@ static bool dcn36_resource_construct(
        dc->caps.color.dpp.gamma_corr = 1;
        dc->caps.color.dpp.dgam_rom_for_yuv = 0;
 
-       dc->caps.color.dpp.hw_3d_lut = 1;
+       dc->caps.color.dpp.hw_3d_lut = 0;
        dc->caps.color.dpp.ogam_ram = 0;  // no OGAM in DPP since DCN1
        // no OGAM ROM on DCN301
        dc->caps.color.dpp.ogam_rom_caps.srgb = 0;
@@ -1866,6 +1866,7 @@ static bool dcn36_resource_construct(
        dc->caps.color.mpc.ogam_rom_caps.pq = 0;
        dc->caps.color.mpc.ogam_rom_caps.hlg = 0;
        dc->caps.color.mpc.ocsc = 1;
+       dc->caps.color.mpc.preblend = true;
 
        dc->caps.num_of_host_routers = 2;
        dc->caps.num_of_dpias_per_host_router = 2;
index b0cf5c9c1cad60ca74661c6d56786ccd2c07cb67..14f478df268af74254c84579456d13e7b8cd7bc8 100644 (file)
@@ -1948,6 +1948,7 @@ static bool dcn401_resource_construct(
        dc->caps.color.mpc.ogam_rom_caps.pq = 0;
        dc->caps.color.mpc.ogam_rom_caps.hlg = 0;
        dc->caps.color.mpc.ocsc = 1;
+       dc->caps.color.mpc.preblend = true;
        dc->config.use_spl = true;
        dc->config.prefer_easf = true;