rs6000: Move V2DI vec_neg under power8-vector [PR105271]

As PR105271 shows, __builtin_altivec_neg_v2di requires option
-mpower8-vector as its pattern expansion relies on subv2di which
has guard VECTOR_UNIT_P8_VECTOR_P (V2DImode).  This fix is to move
the related lines for __builtin_altivec_neg_v2di to the section
of stanza power8-vector.

	PR target/105271

gcc/ChangeLog:

	* config/rs6000/rs6000-builtins.def (NEG_V2DI): Move to [power8-vector]
	stanza.

gcc/testsuite/ChangeLog:

	* gcc.target/powerpc/pr105271.c: New test.

diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def
index 0f527c5d78f4287a67784608024c8b5491a1fb34..f4a9f24bcc5c90eb1d1cac3f1eaac1fdc4704234 100644 (file)
--- a/gcc/config/rs6000/rs6000-builtins.def
+++ b/gcc/config/rs6000/rs6000-builtins.def
@@ -1190,9 +1190,6 @@
   const vd __builtin_altivec_neg_v2df (vd);
     NEG_V2DF negv2df2 {}
 
-  const vsll __builtin_altivec_neg_v2di (vsll);
-    NEG_V2DI negv2di2 {}
-
   void __builtin_altivec_stvx_v2df (vd, signed long, void *);
     STVX_V2DF altivec_stvx_v2df {stvec}
 
@@ -2136,6 +2133,9 @@
   const vus __builtin_altivec_nand_v8hi_uns (vus, vus);
     NAND_V8HI_UNS nandv8hi3 {}
 
+  const vsll __builtin_altivec_neg_v2di (vsll);
+    NEG_V2DI negv2di2 {}
+
   const vsc __builtin_altivec_orc_v16qi (vsc, vsc);
     ORC_V16QI orcv16qi3 {}
 

diff --git a/gcc/testsuite/gcc.target/powerpc/pr105271.c b/gcc/testsuite/gcc.target/powerpc/pr105271.c
new file mode 100644 (file)
index 0000000..1c5f88c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr105271.c
@@ -0,0 +1,14 @@
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-mdejagnu-cpu=power7" } */
+
+/* It's to verify no ICE here, ignore error messages about
+   the required options for vec_neg here.  */
+/* { dg-excess-errors "pr105271" } */
+
+#include <altivec.h>
+
+vector signed long long
+test (vector signed long long x)
+{
+  return vec_neg (x);
+}