Similar to r12444 (see Log below), but this is doing it for x86 and amd64.
The xmm registers are using uint32 or uint64 for their float
union components. For the i387 80 bits float registers, as there is
no uint80, a struct uint16 + uint64 is defined.
Log:
Change the type of the shadow regs for floating point registers
to be uint64. Previously the value in such a shadow reg would
be interpreted by gdb as a floating point value which would
produce non-sensible output for e.g p/x $f1s1.
This patch covers the power and arm architectures.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@12445
* ================== PLATFORM CHANGES =================
-* Support for AES instructions (AESKEYGENASSIST, AESENC, AESENCLAST,
+* Support for amd64 AES instructions (AESKEYGENASSIST, AESENC, AESENCLAST,
AESDEC, AESDECLAST, AESIMC).
* ==================== TOOL CHANGES ====================
* Support to run Valgrind on Valgrind has been improved.
+* gdbserver now shows the float shadow registers as integer
+ rather than float values, as the shadow values are mostly
+ used as bit patterns.
+
* ==================== FIXED BUGS ====================
The following bugs have been fixed or resolved. Note that "n-i-bz"
<field name="ID" start="21" end="21"/>
</flags>
+ <struct id="i387_ext_s">
+ <field name="b64" type="uint64"/>
+ <field name="b16" type="uint16"/>
+ </struct>
+
<reg name="eaxs1" bitsize="32" type="int32"/>
<reg name="ecxs1" bitsize="32" type="int32"/>
<reg name="edxs1" bitsize="32" type="int32"/>
<reg name="fss1" bitsize="32" type="int32"/>
<reg name="gss1" bitsize="32" type="int32"/>
- <reg name="st0s1" bitsize="80" type="i387_ext"/>
- <reg name="st1s1" bitsize="80" type="i387_ext"/>
- <reg name="st2s1" bitsize="80" type="i387_ext"/>
- <reg name="st3s1" bitsize="80" type="i387_ext"/>
- <reg name="st4s1" bitsize="80" type="i387_ext"/>
- <reg name="st5s1" bitsize="80" type="i387_ext"/>
- <reg name="st6s1" bitsize="80" type="i387_ext"/>
- <reg name="st7s1" bitsize="80" type="i387_ext"/>
+ <reg name="st0s1" bitsize="80" type="i387_ext_s"/>
+ <reg name="st1s1" bitsize="80" type="i387_ext_s"/>
+ <reg name="st2s1" bitsize="80" type="i387_ext_s"/>
+ <reg name="st3s1" bitsize="80" type="i387_ext_s"/>
+ <reg name="st4s1" bitsize="80" type="i387_ext_s"/>
+ <reg name="st5s1" bitsize="80" type="i387_ext_s"/>
+ <reg name="st6s1" bitsize="80" type="i387_ext_s"/>
+ <reg name="st7s1" bitsize="80" type="i387_ext_s"/>
<reg name="fctrls1" bitsize="32" type="int" group="float"/>
<reg name="fstats1" bitsize="32" type="int" group="float"/>
<field name="ID" start="21" end="21"/>
</flags>
+ <struct id="i387_ext_s">
+ <field name="b64" type="uint64"/>
+ <field name="b16" type="uint16"/>
+ </struct>
+
<reg name="eaxs2" bitsize="32" type="int32"/>
<reg name="ecxs2" bitsize="32" type="int32"/>
<reg name="edxs2" bitsize="32" type="int32"/>
<reg name="fss2" bitsize="32" type="int32"/>
<reg name="gss2" bitsize="32" type="int32"/>
- <reg name="st0s2" bitsize="80" type="i387_ext"/>
- <reg name="st1s2" bitsize="80" type="i387_ext"/>
- <reg name="st2s2" bitsize="80" type="i387_ext"/>
- <reg name="st3s2" bitsize="80" type="i387_ext"/>
- <reg name="st4s2" bitsize="80" type="i387_ext"/>
- <reg name="st5s2" bitsize="80" type="i387_ext"/>
- <reg name="st6s2" bitsize="80" type="i387_ext"/>
- <reg name="st7s2" bitsize="80" type="i387_ext"/>
+ <reg name="st0s2" bitsize="80" type="i387_ext_s"/>
+ <reg name="st1s2" bitsize="80" type="i387_ext_s"/>
+ <reg name="st2s2" bitsize="80" type="i387_ext_s"/>
+ <reg name="st3s2" bitsize="80" type="i387_ext_s"/>
+ <reg name="st4s2" bitsize="80" type="i387_ext_s"/>
+ <reg name="st5s2" bitsize="80" type="i387_ext_s"/>
+ <reg name="st6s2" bitsize="80" type="i387_ext_s"/>
+ <reg name="st7s2" bitsize="80" type="i387_ext_s"/>
<reg name="fctrls2" bitsize="32" type="int" group="float"/>
<reg name="fstats2" bitsize="32" type="int" group="float"/>
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.i386.sse.valgrind.s1">
- <vector id="v4f" type="ieee_single" count="4"/>
- <vector id="v2d" type="ieee_double" count="2"/>
+ <vector id="v4f_s" type="uint32" count="4"/>
+ <vector id="v2d_s" type="uint64" count="2"/>
<vector id="v16i8" type="int8" count="16"/>
<vector id="v8i16" type="int16" count="8"/>
<vector id="v4i32" type="int32" count="4"/>
<vector id="v2i64" type="int64" count="2"/>
- <union id="vec128">
- <field name="v4_float" type="v4f"/>
- <field name="v2_double" type="v2d"/>
+ <union id="vec128_s">
+ <field name="v4_float" type="v4f_s"/>
+ <field name="v2_double" type="v2d_s"/>
<field name="v16_int8" type="v16i8"/>
<field name="v8_int16" type="v8i16"/>
<field name="v4_int32" type="v4i32"/>
<field name="FZ" start="15" end="15"/>
</flags>
- <reg name="xmm0s1" bitsize="128" type="vec128"/>
- <reg name="xmm1s1" bitsize="128" type="vec128"/>
- <reg name="xmm2s1" bitsize="128" type="vec128"/>
- <reg name="xmm3s1" bitsize="128" type="vec128"/>
- <reg name="xmm4s1" bitsize="128" type="vec128"/>
- <reg name="xmm5s1" bitsize="128" type="vec128"/>
- <reg name="xmm6s1" bitsize="128" type="vec128"/>
- <reg name="xmm7s1" bitsize="128" type="vec128"/>
+ <reg name="xmm0s1" bitsize="128" type="vec128_s"/>
+ <reg name="xmm1s1" bitsize="128" type="vec128_s"/>
+ <reg name="xmm2s1" bitsize="128" type="vec128_s"/>
+ <reg name="xmm3s1" bitsize="128" type="vec128_s"/>
+ <reg name="xmm4s1" bitsize="128" type="vec128_s"/>
+ <reg name="xmm5s1" bitsize="128" type="vec128_s"/>
+ <reg name="xmm6s1" bitsize="128" type="vec128_s"/>
+ <reg name="xmm7s1" bitsize="128" type="vec128_s"/>
<reg name="mxcsrs1" bitsize="32" type="i386_mxcsr" group="vector"/>
</feature>
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.i386.sse.valgrind.s2">
- <vector id="v4f" type="ieee_single" count="4"/>
- <vector id="v2d" type="ieee_double" count="2"/>
+ <vector id="v4f_s" type="uint32" count="4"/>
+ <vector id="v2d_s" type="uint64" count="2"/>
<vector id="v16i8" type="int8" count="16"/>
<vector id="v8i16" type="int16" count="8"/>
<vector id="v4i32" type="int32" count="4"/>
<vector id="v2i64" type="int64" count="2"/>
- <union id="vec128">
- <field name="v4_float" type="v4f"/>
- <field name="v2_double" type="v2d"/>
+ <union id="vec128_s">
+ <field name="v4_float" type="v4f_s"/>
+ <field name="v2_double" type="v2d_s"/>
<field name="v16_int8" type="v16i8"/>
<field name="v8_int16" type="v8i16"/>
<field name="v4_int32" type="v4i32"/>
<field name="FZ" start="15" end="15"/>
</flags>
- <reg name="xmm0s2" bitsize="128" type="vec128"/>
- <reg name="xmm1s2" bitsize="128" type="vec128"/>
- <reg name="xmm2s2" bitsize="128" type="vec128"/>
- <reg name="xmm3s2" bitsize="128" type="vec128"/>
- <reg name="xmm4s2" bitsize="128" type="vec128"/>
- <reg name="xmm5s2" bitsize="128" type="vec128"/>
- <reg name="xmm6s2" bitsize="128" type="vec128"/>
- <reg name="xmm7s2" bitsize="128" type="vec128"/>
+ <reg name="xmm0s2" bitsize="128" type="vec128_s"/>
+ <reg name="xmm1s2" bitsize="128" type="vec128_s"/>
+ <reg name="xmm2s2" bitsize="128" type="vec128_s"/>
+ <reg name="xmm3s2" bitsize="128" type="vec128_s"/>
+ <reg name="xmm4s2" bitsize="128" type="vec128_s"/>
+ <reg name="xmm5s2" bitsize="128" type="vec128_s"/>
+ <reg name="xmm6s2" bitsize="128" type="vec128_s"/>
+ <reg name="xmm7s2" bitsize="128" type="vec128_s"/>
<reg name="mxcsrs2" bitsize="32" type="i386_mxcsr" group="vector"/>
</feature>
<field name="ID" start="21" end="21"/>
</flags>
+ <struct id="i387_ext_s">
+ <field name="b64" type="uint64"/>
+ <field name="b16" type="uint16"/>
+ </struct>
+
<reg name="raxs1" bitsize="64" type="int64"/>
<reg name="rbxs1" bitsize="64" type="int64"/>
<reg name="rcxs1" bitsize="64" type="int64"/>
<reg name="fss1" bitsize="32" type="int32"/>
<reg name="gss1" bitsize="32" type="int32"/>
- <reg name="st0s1" bitsize="80" type="i387_ext"/>
- <reg name="st1s1" bitsize="80" type="i387_ext"/>
- <reg name="st2s1" bitsize="80" type="i387_ext"/>
- <reg name="st3s1" bitsize="80" type="i387_ext"/>
- <reg name="st4s1" bitsize="80" type="i387_ext"/>
- <reg name="st5s1" bitsize="80" type="i387_ext"/>
- <reg name="st6s1" bitsize="80" type="i387_ext"/>
- <reg name="st7s1" bitsize="80" type="i387_ext"/>
+ <reg name="st0s1" bitsize="80" type="i387_ext_s"/>
+ <reg name="st1s1" bitsize="80" type="i387_ext_s"/>
+ <reg name="st2s1" bitsize="80" type="i387_ext_s"/>
+ <reg name="st3s1" bitsize="80" type="i387_ext_s"/>
+ <reg name="st4s1" bitsize="80" type="i387_ext_s"/>
+ <reg name="st5s1" bitsize="80" type="i387_ext_s"/>
+ <reg name="st6s1" bitsize="80" type="i387_ext_s"/>
+ <reg name="st7s1" bitsize="80" type="i387_ext_s"/>
<reg name="fctrls1" bitsize="32" type="int" group="float"/>
<reg name="fstats1" bitsize="32" type="int" group="float"/>
<field name="ID" start="21" end="21"/>
</flags>
+ <struct id="i387_ext_s">
+ <field name="b64" type="uint64"/>
+ <field name="b16" type="uint16"/>
+ </struct>
+
<reg name="raxs2" bitsize="64" type="int64"/>
<reg name="rbxs2" bitsize="64" type="int64"/>
<reg name="rcxs2" bitsize="64" type="int64"/>
<reg name="fss2" bitsize="32" type="int32"/>
<reg name="gss2" bitsize="32" type="int32"/>
- <reg name="st0s2" bitsize="80" type="i387_ext"/>
- <reg name="st1s2" bitsize="80" type="i387_ext"/>
- <reg name="st2s2" bitsize="80" type="i387_ext"/>
- <reg name="st3s2" bitsize="80" type="i387_ext"/>
- <reg name="st4s2" bitsize="80" type="i387_ext"/>
- <reg name="st5s2" bitsize="80" type="i387_ext"/>
- <reg name="st6s2" bitsize="80" type="i387_ext"/>
- <reg name="st7s2" bitsize="80" type="i387_ext"/>
+ <reg name="st0s2" bitsize="80" type="i387_ext_s"/>
+ <reg name="st1s2" bitsize="80" type="i387_ext_s"/>
+ <reg name="st2s2" bitsize="80" type="i387_ext_s"/>
+ <reg name="st3s2" bitsize="80" type="i387_ext_s"/>
+ <reg name="st4s2" bitsize="80" type="i387_ext_s"/>
+ <reg name="st5s2" bitsize="80" type="i387_ext_s"/>
+ <reg name="st6s2" bitsize="80" type="i387_ext_s"/>
+ <reg name="st7s2" bitsize="80" type="i387_ext_s"/>
<reg name="fctrls2" bitsize="32" type="int" group="float"/>
<reg name="fstats2" bitsize="32" type="int" group="float"/>
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.i386.sse.valgrind.s1">
- <vector id="v4f" type="ieee_single" count="4"/>
- <vector id="v2d" type="ieee_double" count="2"/>
+ <vector id="v4f_s" type="uint32" count="4"/>
+ <vector id="v2d_s" type="uint64" count="2"/>
<vector id="v16i8" type="int8" count="16"/>
<vector id="v8i16" type="int16" count="8"/>
<vector id="v4i32" type="int32" count="4"/>
<vector id="v2i64" type="int64" count="2"/>
- <union id="vec128">
- <field name="v4_float" type="v4f"/>
- <field name="v2_double" type="v2d"/>
+ <union id="vec128_s">
+ <field name="v4_float" type="v4f_s"/>
+ <field name="v2_double" type="v2d_s"/>
<field name="v16_int8" type="v16i8"/>
<field name="v8_int16" type="v8i16"/>
<field name="v4_int32" type="v4i32"/>
<field name="FZ" start="15" end="15"/>
</flags>
- <reg name="xmm0s1" bitsize="128" type="vec128"/>
- <reg name="xmm1s1" bitsize="128" type="vec128"/>
- <reg name="xmm2s1" bitsize="128" type="vec128"/>
- <reg name="xmm3s1" bitsize="128" type="vec128"/>
- <reg name="xmm4s1" bitsize="128" type="vec128"/>
- <reg name="xmm5s1" bitsize="128" type="vec128"/>
- <reg name="xmm6s1" bitsize="128" type="vec128"/>
- <reg name="xmm7s1" bitsize="128" type="vec128"/>
- <reg name="xmm8s1" bitsize="128" type="vec128"/>
- <reg name="xmm9s1" bitsize="128" type="vec128"/>
- <reg name="xmm10s1" bitsize="128" type="vec128"/>
- <reg name="xmm11s1" bitsize="128" type="vec128"/>
- <reg name="xmm12s1" bitsize="128" type="vec128"/>
- <reg name="xmm13s1" bitsize="128" type="vec128"/>
- <reg name="xmm14s1" bitsize="128" type="vec128"/>
- <reg name="xmm15s1" bitsize="128" type="vec128"/>
+ <reg name="xmm0s1" bitsize="128" type="vec128_s"/>
+ <reg name="xmm1s1" bitsize="128" type="vec128_s"/>
+ <reg name="xmm2s1" bitsize="128" type="vec128_s"/>
+ <reg name="xmm3s1" bitsize="128" type="vec128_s"/>
+ <reg name="xmm4s1" bitsize="128" type="vec128_s"/>
+ <reg name="xmm5s1" bitsize="128" type="vec128_s"/>
+ <reg name="xmm6s1" bitsize="128" type="vec128_s"/>
+ <reg name="xmm7s1" bitsize="128" type="vec128_s"/>
+ <reg name="xmm8s1" bitsize="128" type="vec128_s"/>
+ <reg name="xmm9s1" bitsize="128" type="vec128_s"/>
+ <reg name="xmm10s1" bitsize="128" type="vec128_s"/>
+ <reg name="xmm11s1" bitsize="128" type="vec128_s"/>
+ <reg name="xmm12s1" bitsize="128" type="vec128_s"/>
+ <reg name="xmm13s1" bitsize="128" type="vec128_s"/>
+ <reg name="xmm14s1" bitsize="128" type="vec128_s"/>
+ <reg name="xmm15s1" bitsize="128" type="vec128_s"/>
<reg name="mxcsrs1" bitsize="32" type="i386_mxcsr" group="vector"/>
</feature>
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.i386.sse.valgrind.s2">
- <vector id="v4f" type="ieee_single" count="4"/>
- <vector id="v2d" type="ieee_double" count="2"/>
+ <vector id="v4f_s" type="uint32" count="4"/>
+ <vector id="v2d_s" type="uint64" count="2"/>
<vector id="v16i8" type="int8" count="16"/>
<vector id="v8i16" type="int16" count="8"/>
<vector id="v4i32" type="int32" count="4"/>
<vector id="v2i64" type="int64" count="2"/>
- <union id="vec128">
- <field name="v4_float" type="v4f"/>
- <field name="v2_double" type="v2d"/>
+ <union id="vec128_s">
+ <field name="v4_float" type="v4f_s"/>
+ <field name="v2_double" type="v2d_s"/>
<field name="v16_int8" type="v16i8"/>
<field name="v8_int16" type="v8i16"/>
<field name="v4_int32" type="v4i32"/>
<field name="FZ" start="15" end="15"/>
</flags>
- <reg name="xmm0s2" bitsize="128" type="vec128"/>
- <reg name="xmm1s2" bitsize="128" type="vec128"/>
- <reg name="xmm2s2" bitsize="128" type="vec128"/>
- <reg name="xmm3s2" bitsize="128" type="vec128"/>
- <reg name="xmm4s2" bitsize="128" type="vec128"/>
- <reg name="xmm5s2" bitsize="128" type="vec128"/>
- <reg name="xmm6s2" bitsize="128" type="vec128"/>
- <reg name="xmm7s2" bitsize="128" type="vec128"/>
- <reg name="xmm8s2" bitsize="128" type="vec128"/>
- <reg name="xmm9s2" bitsize="128" type="vec128"/>
- <reg name="xmm10s2" bitsize="128" type="vec128"/>
- <reg name="xmm11s2" bitsize="128" type="vec128"/>
- <reg name="xmm12s2" bitsize="128" type="vec128"/>
- <reg name="xmm13s2" bitsize="128" type="vec128"/>
- <reg name="xmm14s2" bitsize="128" type="vec128"/>
- <reg name="xmm15s2" bitsize="128" type="vec128"/>
+ <reg name="xmm0s2" bitsize="128" type="vec128_s"/>
+ <reg name="xmm1s2" bitsize="128" type="vec128_s"/>
+ <reg name="xmm2s2" bitsize="128" type="vec128_s"/>
+ <reg name="xmm3s2" bitsize="128" type="vec128_s"/>
+ <reg name="xmm4s2" bitsize="128" type="vec128_s"/>
+ <reg name="xmm5s2" bitsize="128" type="vec128_s"/>
+ <reg name="xmm6s2" bitsize="128" type="vec128_s"/>
+ <reg name="xmm7s2" bitsize="128" type="vec128_s"/>
+ <reg name="xmm8s2" bitsize="128" type="vec128_s"/>
+ <reg name="xmm9s2" bitsize="128" type="vec128_s"/>
+ <reg name="xmm10s2" bitsize="128" type="vec128_s"/>
+ <reg name="xmm11s2" bitsize="128" type="vec128_s"/>
+ <reg name="xmm12s2" bitsize="128" type="vec128_s"/>
+ <reg name="xmm13s2" bitsize="128" type="vec128_s"/>
+ <reg name="xmm14s2" bitsize="128" type="vec128_s"/>
+ <reg name="xmm15s2" bitsize="128" type="vec128_s"/>
<reg name="mxcsrs2" bitsize="32" type="i386_mxcsr" group="vector"/>
</feature>
<para> When the option <option>--vgdb-shadow-registers=yes</option> is
given, the Valgrind gdbserver will let GDB examine and/or modify
Valgrind's shadow registers. GDB version 7.1 or later is needed for this
-to work.</para>
+to work. For x86 and amd64, GDB version 7.2 or later is needed.</para>
<para>For each CPU register, the Valgrind core maintains two
shadow register sets. These shadow registers can be accessed from
(gdb)
]]></programlisting>
+<para>Float shadow registers are shown by GDB as unsigned integer
+values instead of float values, as it is expected that these
+shadow values are mostly used for memcheck validity bits. </para>
+
</sect2>