2004-03-30 Matthias Klose <doko@debian.org>
Backport:
2004-01-14 Richard Earnshaw <rearnsha@arm.com>
PR bootstrap/12527
* config.gcc (arm*-*-linux*): Don't include unknown-elf.h in tm_file.
Move linux-gas.h and linux-elf.h before aout.h.
* arm/arm.h (INITIALIZE_TRAMPOLINE): Only define if not already.
* arm/linux-elf.h (SUBTARGET_CPU_DEFAULT): Define.
2003-05-15 Philip Blundell <philb@gnu.org>
* config/arm/arm.c (arm_is_xscale): Rename to arm_arch_xscale.
All uses updated.
(arm_tune_xscale): New variable.
(arm_override_options): Set it.
(arm_adjust_cost): Use it in place of arm_arch_xscale.
(arm_gen_load_multiple): Likewise.
(arm_gen_store_multiple): Likewise.
* config/arm/arm.md (is_xscale): Likewise.
* config/arm/arm.h (arm_tune_xscale): Declare.
2003-04-28 Nick Clifton <nickc@redhat.com>
* config/arm/elf.h (ASM_OUTPUT_ALIGNED_COMMON): Remove definition.
From-SVN: r80094
+2004-03-30 Matthias Klose <doko@debian.org>
+
+ Backport:
+
+ 2004-01-14 Richard Earnshaw <rearnsha@arm.com>
+
+ PR bootstrap/12527
+ * config.gcc (arm*-*-linux*): Don't include unknown-elf.h in tm_file.
+ Move linux-gas.h and linux-elf.h before aout.h.
+ * arm/arm.h (INITIALIZE_TRAMPOLINE): Only define if not already.
+ * arm/linux-elf.h (SUBTARGET_CPU_DEFAULT): Define.
+
+ 2003-05-15 Philip Blundell <philb@gnu.org>
+
+ * config/arm/arm.c (arm_is_xscale): Rename to arm_arch_xscale.
+ All uses updated.
+ (arm_tune_xscale): New variable.
+ (arm_override_options): Set it.
+ (arm_adjust_cost): Use it in place of arm_arch_xscale.
+ (arm_gen_load_multiple): Likewise.
+ (arm_gen_store_multiple): Likewise.
+ * config/arm/arm.md (is_xscale): Likewise.
+ * config/arm/arm.h (arm_tune_xscale): Declare.
+
+ 2003-04-28 Nick Clifton <nickc@redhat.com>
+
+ * config/arm/elf.h (ASM_OUTPUT_ALIGNED_COMMON): Remove definition.
+
2004-03-29 Matthias Klose <doko@debian.org>
2003-09-17 Daniel Jacobowitz <drow@mvista.com>
use_collect2=yes
;;
arm*-*-linux*) # ARM GNU/Linux with ELF
- tm_file="dbxelf.h elfos.h arm/unknown-elf.h arm/elf.h arm/aout.h arm/arm.h arm/linux-gas.h arm/linux-elf.h"
+ tm_file="dbxelf.h elfos.h arm/elf.h arm/linux-gas.h arm/linux-elf.h arm/aout.h arm/arm.h"
tmake_file="t-slibgcc-elf-ver t-linux arm/t-linux"
extra_parts="crtbegin.o crtbeginS.o crtend.o crtendS.o"
gnu_ld=yes
int arm_is_strong = 0;
/* Nonzero if this chip is an XScale. */
-int arm_is_xscale = 0;
+int arm_arch_xscale = 0;
+
+/* Nonzero if tuning for XScale */
+int arm_tune_xscale = 0;
/* Nonzero if this chip is an ARM6 or an ARM7. */
int arm_is_6_or_7 = 0;
arm_arch4 = (insn_flags & FL_ARCH4) != 0;
arm_arch5 = (insn_flags & FL_ARCH5) != 0;
arm_arch5e = (insn_flags & FL_ARCH5E) != 0;
- arm_is_xscale = (insn_flags & FL_XSCALE) != 0;
+ arm_arch_xscale = (insn_flags & FL_XSCALE) != 0;
arm_ld_sched = (tune_flags & FL_LDSCHED) != 0;
arm_is_strong = (tune_flags & FL_STRONG) != 0;
thumb_code = (TARGET_ARM == 0);
arm_is_6_or_7 = (((tune_flags & (FL_MODE26 | FL_MODE32))
&& !(tune_flags & FL_ARCH4))) != 0;
+ arm_tune_xscale = (tune_flags & FL_XSCALE) != 0;
/* Default value for floating point code... if no co-processor
bus, then schedule for emulated floating point. Otherwise,
if (optimize_size || (tune_flags & FL_LDSCHED))
arm_constant_limit = 1;
- if (arm_is_xscale)
+ if (arm_arch_xscale)
arm_constant_limit = 2;
/* If optimizing for size, bump the number of instructions that we
/* Some true dependencies can have a higher cost depending
on precisely how certain input operands are used. */
- if (arm_is_xscale
+ if (arm_tune_xscale
&& REG_NOTE_KIND (link) == 0
&& recog_memoized (insn) < 0
&& recog_memoized (dep) < 0)
As a compromise, we use ldr for counts of 1 or 2 regs, and ldm
for counts of 3 or 4 regs. */
- if (arm_is_xscale && count <= 2 && ! optimize_size)
+ if (arm_tune_xscale && count <= 2 && ! optimize_size)
{
rtx seq;
/* See arm_gen_load_multiple for discussion of
the pros/cons of ldm/stm usage for XScale. */
- if (arm_is_xscale && count <= 2 && ! optimize_size)
+ if (arm_tune_xscale && count <= 2 && ! optimize_size)
{
rtx seq;
extern int arm_is_strong;
/* Nonzero if this chip is an XScale. */
-extern int arm_is_xscale;
+extern int arm_arch_xscale;
+
+/* Nonzero if tuning for XScale */
+extern int arm_tune_xscale;
/* Nonzero if this chip is an ARM6 or an ARM7. */
extern int arm_is_6_or_7;
#define BIGGEST_ALIGNMENT 32
/* Make strings word-aligned so strcpy from constants will be faster. */
-#define CONSTANT_ALIGNMENT_FACTOR (TARGET_THUMB || ! arm_is_xscale ? 1 : 2)
+#define CONSTANT_ALIGNMENT_FACTOR (TARGET_THUMB || ! arm_arch_xscale ? 1 : 2)
#define CONSTANT_ALIGNMENT(EXP, ALIGN) \
((TREE_CODE (EXP) == STRING_CST \
/* Emit RTL insns to initialize the variable parts of a trampoline.
FNADDR is an RTX for the address of the function's pure code.
CXT is an RTX for the static chain value for the function. */
-#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
-{ \
- emit_move_insn \
- (gen_rtx_MEM (SImode, plus_constant (TRAMP, TARGET_ARM ? 8 : 16)), CXT); \
- emit_move_insn \
- (gen_rtx_MEM (SImode, plus_constant (TRAMP, TARGET_ARM ? 12 : 20)), FNADDR); \
+#ifndef INITIALIZE_TRAMPOLINE
+#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
+{ \
+ emit_move_insn (gen_rtx_MEM (SImode, \
+ plus_constant (TRAMP, \
+ TARGET_ARM ? 8 : 16)), \
+ CXT); \
+ emit_move_insn (gen_rtx_MEM (SImode, \
+ plus_constant (TRAMP, \
+ TARGET_ARM ? 12 : 20)), \
+ FNADDR); \
}
+#endif
\f
/* Addressing modes, and classification of registers for them. */
#define MOVE_MAX 4
#undef MOVE_RATIO
-#define MOVE_RATIO (arm_is_xscale ? 4 : 2)
+#define MOVE_RATIO (arm_arch_xscale ? 4 : 2)
/* Define if operations between registers always perform the operation
on the full register even if a narrower mode is specified. */
;; Operand number of an input operand that is shifted. Zero if the
;; given instruction does not shift one of its input operands.
-(define_attr "is_xscale" "no,yes" (const (symbol_ref "arm_is_xscale")))
+(define_attr "is_xscale" "no,yes" (const (symbol_ref "arm_tune_xscale")))
(define_attr "shift" "" (const_int 0))
; Floating Point Unit. If we only have floating point emulation, then there
(const_int 0)))
(set (match_operand:SI 0 "s_register_operand" "=&r,&r")
(mult:SI (match_dup 2) (match_dup 1)))]
- "TARGET_ARM && !arm_is_xscale"
+ "TARGET_ARM && !arm_arch_xscale"
"mul%?s\\t%0, %2, %1"
[(set_attr "conds" "set")
(set_attr "type" "mult")]
(match_operand:SI 1 "s_register_operand" "%?r,0"))
(const_int 0)))
(clobber (match_scratch:SI 0 "=&r,&r"))]
- "TARGET_ARM && !arm_is_xscale"
+ "TARGET_ARM && !arm_arch_xscale"
"mul%?s\\t%0, %2, %1"
[(set_attr "conds" "set")
(set_attr "type" "mult")]
(set (match_operand:SI 0 "s_register_operand" "=&r,&r,&r,&r")
(plus:SI (mult:SI (match_dup 2) (match_dup 1))
(match_dup 3)))]
- "TARGET_ARM && !arm_is_xscale"
+ "TARGET_ARM && !arm_arch_xscale"
"mla%?s\\t%0, %2, %1, %3"
[(set_attr "conds" "set")
(set_attr "type" "mult")]
(match_operand:SI 3 "s_register_operand" "?r,r,0,0"))
(const_int 0)))
(clobber (match_scratch:SI 0 "=&r,&r,&r,&r"))]
- "TARGET_ARM && !arm_is_xscale"
+ "TARGET_ARM && !arm_arch_xscale"
"mla%?s\\t%0, %2, %1, %3"
[(set_attr "conds" "set")
(set_attr "type" "mult")]
(match_operand:HI 1 "s_register_operand" "%r"))
(sign_extend:SI
(match_operand:HI 2 "s_register_operand" "r"))))]
- "TARGET_ARM && arm_is_xscale"
+ "TARGET_ARM && arm_arch_xscale"
"smulbb%?\\t%0, %1, %2"
[(set_attr "type" "mult")]
)
(match_operand:HI 2 "s_register_operand" "%r"))
(sign_extend:SI
(match_operand:HI 3 "s_register_operand" "r")))))]
- "TARGET_ARM && arm_is_xscale"
+ "TARGET_ARM && arm_arch_xscale"
"smlabb%?\\t%0, %2, %3, %1"
[(set_attr "type" "mult")]
)
(match_operand:HI 2 "s_register_operand" "%r"))
(sign_extend:DI
(match_operand:HI 3 "s_register_operand" "r")))))]
- "TARGET_ARM && arm_is_xscale"
+ "TARGET_ARM && arm_arch_xscale"
"smlalbb%?\\t%Q0, %R0, %2, %3"
[(set_attr "type" "mult")])
#undef TARGET_ASM_NAMED_SECTION
#define TARGET_ASM_NAMED_SECTION arm_elf_asm_named_section
\f
-#undef ASM_OUTPUT_ALIGNED_COMMON
-#define ASM_OUTPUT_ALIGNED_COMMON(STREAM, NAME, SIZE, ALIGN) \
- do \
- { \
- fprintf (STREAM, "\t.comm\t"); \
- assemble_name (STREAM, NAME); \
- fprintf (STREAM, ", %d, %d\n", SIZE, ALIGN); \
- } \
- while (0)
-
/* For PIC code we need to explicitly specify (PLT) and (GOT) relocs. */
#define NEED_PLT_RELOC flag_pic
#define NEED_GOT_RELOC flag_pic
#undef TARGET_DEFAULT
#define TARGET_DEFAULT (ARM_FLAG_APCS_32 | ARM_FLAG_MMU_TRAPS)
+#define SUBTARGET_CPU_DEFAULT TARGET_CPU_arm6
+
#define SUBTARGET_EXTRA_LINK_SPEC " -m armelf_linux -p"
#undef MULTILIB_DEFAULTS
projects / thirdparty / gcc.git / commitdiff
