]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/amdgpu: Enable PDE.C usage on GFX 12.1
authorMukul Joshi <mukul.joshi@amd.com>
Sat, 6 Sep 2025 02:33:15 +0000 (22:33 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 8 Dec 2025 18:56:35 +0000 (13:56 -0500)
On GFX 12.1, PDE.C is ignored if (PDE|PTE)_REQUEST_PHYSICAL
is not setup in the GCVM control register. Always set this
field to enable PDE.C usage.

Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Reviewed-by: Alex Sierra <alex.sierra@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

index 971562f2b8297b4192820e99719b314244cd7f84..ceb7eb562ef0a6a53531816d269674135a375af6 100644 (file)
@@ -322,18 +322,10 @@ static void gfxhub_v12_1_xcc_init_cache_regs(struct amdgpu_device *adev,
                WREG32_SOC15_RLC(GC, GET_INST(GC, i), regGCVM_L2_CNTL3, tmp);
 
                tmp = regGCVM_L2_CNTL4_DEFAULT;
-               /* For AMD APP APUs setup WC memory */
-               if (adev->gmc.xgmi.connected_to_cpu || adev->gmc.is_app_apu) {
-                       tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL4,
-                                           VMC_TAP_PDE_REQUEST_PHYSICAL, 1);
-                       tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL4,
-                                           VMC_TAP_PTE_REQUEST_PHYSICAL, 1);
-               } else {
-                       tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL4,
-                                           VMC_TAP_PDE_REQUEST_PHYSICAL, 0);
-                       tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL4,
-                                           VMC_TAP_PTE_REQUEST_PHYSICAL, 0);
-               }
+               tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL4,
+                                   VMC_TAP_PDE_REQUEST_PHYSICAL, 1);
+               tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL4,
+                                   VMC_TAP_PTE_REQUEST_PHYSICAL, 1);
                WREG32_SOC15_RLC(GC, GET_INST(GC, i), regGCVM_L2_CNTL4, tmp);
 
                tmp = regGCVM_L2_CNTL5_DEFAULT;