]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
pinctrl: samsung: refactor drvdata suspend & resume callbacks
authorPeter Griffin <peter.griffin@linaro.org>
Wed, 2 Apr 2025 15:17:30 +0000 (16:17 +0100)
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Tue, 8 Apr 2025 18:57:46 +0000 (20:57 +0200)
This enables the clk_enable() and clk_disable() logic to be removed
from each callback, but otherwise should have no functional impact.

It is a prepatory patch so that the callbacks can become SoC
specific.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Link: https://lore.kernel.org/r/20250402-pinctrl-fltcon-suspend-v6-1-78ce0d4eb30c@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
drivers/pinctrl/samsung/pinctrl-exynos.c
drivers/pinctrl/samsung/pinctrl-exynos.h
drivers/pinctrl/samsung/pinctrl-samsung.c
drivers/pinctrl/samsung/pinctrl-samsung.h

index 42093bae8bb79390f3c0ee7d387220b297af812b..ae82f42be83cf0a294452d7f44cd744295bb0408 100644 (file)
@@ -762,19 +762,11 @@ __init int exynos_eint_wkup_init(struct samsung_pinctrl_drv_data *d)
        return 0;
 }
 
-static void exynos_pinctrl_suspend_bank(
-                               struct samsung_pinctrl_drv_data *drvdata,
-                               struct samsung_pin_bank *bank)
+static void exynos_pinctrl_suspend_bank(struct samsung_pin_bank *bank)
 {
        struct exynos_eint_gpio_save *save = bank->soc_priv;
        const void __iomem *regs = bank->eint_base;
 
-       if (clk_enable(bank->drvdata->pclk)) {
-               dev_err(bank->gpio_chip.parent,
-                       "unable to enable clock for saving state\n");
-               return;
-       }
-
        save->eint_con = readl(regs + EXYNOS_GPIO_ECON_OFFSET
                                                + bank->eint_offset);
        save->eint_fltcon0 = readl(regs + EXYNOS_GPIO_EFLTCON_OFFSET
@@ -784,71 +776,46 @@ static void exynos_pinctrl_suspend_bank(
        save->eint_mask = readl(regs + bank->irq_chip->eint_mask
                                                + bank->eint_offset);
 
-       clk_disable(bank->drvdata->pclk);
-
        pr_debug("%s: save     con %#010x\n", bank->name, save->eint_con);
        pr_debug("%s: save fltcon0 %#010x\n", bank->name, save->eint_fltcon0);
        pr_debug("%s: save fltcon1 %#010x\n", bank->name, save->eint_fltcon1);
        pr_debug("%s: save    mask %#010x\n", bank->name, save->eint_mask);
 }
 
-static void exynosauto_pinctrl_suspend_bank(struct samsung_pinctrl_drv_data *drvdata,
-                                           struct samsung_pin_bank *bank)
+static void exynosauto_pinctrl_suspend_bank(struct samsung_pin_bank *bank)
 {
        struct exynos_eint_gpio_save *save = bank->soc_priv;
        const void __iomem *regs = bank->eint_base;
 
-       if (clk_enable(bank->drvdata->pclk)) {
-               dev_err(bank->gpio_chip.parent,
-                       "unable to enable clock for saving state\n");
-               return;
-       }
-
        save->eint_con = readl(regs + bank->pctl_offset + bank->eint_con_offset);
        save->eint_mask = readl(regs + bank->pctl_offset + bank->eint_mask_offset);
 
-       clk_disable(bank->drvdata->pclk);
-
        pr_debug("%s: save     con %#010x\n", bank->name, save->eint_con);
        pr_debug("%s: save    mask %#010x\n", bank->name, save->eint_mask);
 }
 
-void exynos_pinctrl_suspend(struct samsung_pinctrl_drv_data *drvdata)
+void exynos_pinctrl_suspend(struct samsung_pin_bank *bank)
 {
-       struct samsung_pin_bank *bank = drvdata->pin_banks;
        struct exynos_irq_chip *irq_chip = NULL;
-       int i;
 
-       for (i = 0; i < drvdata->nr_banks; ++i, ++bank) {
-               if (bank->eint_type == EINT_TYPE_GPIO) {
-                       if (bank->eint_con_offset)
-                               exynosauto_pinctrl_suspend_bank(drvdata, bank);
-                       else
-                               exynos_pinctrl_suspend_bank(drvdata, bank);
-               }
-               else if (bank->eint_type == EINT_TYPE_WKUP) {
-                       if (!irq_chip) {
-                               irq_chip = bank->irq_chip;
-                               irq_chip->set_eint_wakeup_mask(drvdata,
-                                                              irq_chip);
-                       }
+       if (bank->eint_type == EINT_TYPE_GPIO) {
+               if (bank->eint_con_offset)
+                       exynosauto_pinctrl_suspend_bank(bank);
+               else
+                       exynos_pinctrl_suspend_bank(bank);
+       } else if (bank->eint_type == EINT_TYPE_WKUP) {
+               if (!irq_chip) {
+                       irq_chip = bank->irq_chip;
+                       irq_chip->set_eint_wakeup_mask(bank->drvdata, irq_chip);
                }
        }
 }
 
-static void exynos_pinctrl_resume_bank(
-                               struct samsung_pinctrl_drv_data *drvdata,
-                               struct samsung_pin_bank *bank)
+static void exynos_pinctrl_resume_bank(struct samsung_pin_bank *bank)
 {
        struct exynos_eint_gpio_save *save = bank->soc_priv;
        void __iomem *regs = bank->eint_base;
 
-       if (clk_enable(bank->drvdata->pclk)) {
-               dev_err(bank->gpio_chip.parent,
-                       "unable to enable clock for restoring state\n");
-               return;
-       }
-
        pr_debug("%s:     con %#010x => %#010x\n", bank->name,
                        readl(regs + EXYNOS_GPIO_ECON_OFFSET
                        + bank->eint_offset), save->eint_con);
@@ -870,22 +837,13 @@ static void exynos_pinctrl_resume_bank(
                                                + 2 * bank->eint_offset + 4);
        writel(save->eint_mask, regs + bank->irq_chip->eint_mask
                                                + bank->eint_offset);
-
-       clk_disable(bank->drvdata->pclk);
 }
 
-static void exynosauto_pinctrl_resume_bank(struct samsung_pinctrl_drv_data *drvdata,
-                                          struct samsung_pin_bank *bank)
+static void exynosauto_pinctrl_resume_bank(struct samsung_pin_bank *bank)
 {
        struct exynos_eint_gpio_save *save = bank->soc_priv;
        void __iomem *regs = bank->eint_base;
 
-       if (clk_enable(bank->drvdata->pclk)) {
-               dev_err(bank->gpio_chip.parent,
-                       "unable to enable clock for restoring state\n");
-               return;
-       }
-
        pr_debug("%s:     con %#010x => %#010x\n", bank->name,
                 readl(regs + bank->pctl_offset + bank->eint_con_offset), save->eint_con);
        pr_debug("%s:    mask %#010x => %#010x\n", bank->name,
@@ -894,21 +852,16 @@ static void exynosauto_pinctrl_resume_bank(struct samsung_pinctrl_drv_data *drvd
        writel(save->eint_con, regs + bank->pctl_offset + bank->eint_con_offset);
        writel(save->eint_mask, regs + bank->pctl_offset + bank->eint_mask_offset);
 
-       clk_disable(bank->drvdata->pclk);
 }
 
-void exynos_pinctrl_resume(struct samsung_pinctrl_drv_data *drvdata)
+void exynos_pinctrl_resume(struct samsung_pin_bank *bank)
 {
-       struct samsung_pin_bank *bank = drvdata->pin_banks;
-       int i;
-
-       for (i = 0; i < drvdata->nr_banks; ++i, ++bank)
-               if (bank->eint_type == EINT_TYPE_GPIO) {
-                       if (bank->eint_con_offset)
-                               exynosauto_pinctrl_resume_bank(drvdata, bank);
-                       else
-                               exynos_pinctrl_resume_bank(drvdata, bank);
-               }
+       if (bank->eint_type == EINT_TYPE_GPIO) {
+               if (bank->eint_con_offset)
+                       exynosauto_pinctrl_resume_bank(bank);
+               else
+                       exynos_pinctrl_resume_bank(bank);
+       }
 }
 
 static void exynos_retention_enable(struct samsung_pinctrl_drv_data *drvdata)
index b483270ddc53c0b0e8d0f425cd7b0f59e6a894da..341155c1abd153eb3efec5212b268ccfa535bd8e 100644 (file)
@@ -240,8 +240,8 @@ struct exynos_muxed_weint_data {
 
 int exynos_eint_gpio_init(struct samsung_pinctrl_drv_data *d);
 int exynos_eint_wkup_init(struct samsung_pinctrl_drv_data *d);
-void exynos_pinctrl_suspend(struct samsung_pinctrl_drv_data *drvdata);
-void exynos_pinctrl_resume(struct samsung_pinctrl_drv_data *drvdata);
+void exynos_pinctrl_suspend(struct samsung_pin_bank *bank);
+void exynos_pinctrl_resume(struct samsung_pin_bank *bank);
 struct samsung_retention_ctrl *
 exynos_retention_init(struct samsung_pinctrl_drv_data *drvdata,
                      const struct samsung_retention_data *data);
index 2896eb2de2c098c72adc4de5c9d72bb2b7e46bdb..ef557217e173af905c1667c6a167c5c77057e254 100644 (file)
@@ -1333,6 +1333,7 @@ err_put_banks:
 static int __maybe_unused samsung_pinctrl_suspend(struct device *dev)
 {
        struct samsung_pinctrl_drv_data *drvdata = dev_get_drvdata(dev);
+       struct samsung_pin_bank *bank;
        int i;
 
        i = clk_enable(drvdata->pclk);
@@ -1343,7 +1344,7 @@ static int __maybe_unused samsung_pinctrl_suspend(struct device *dev)
        }
 
        for (i = 0; i < drvdata->nr_banks; i++) {
-               struct samsung_pin_bank *bank = &drvdata->pin_banks[i];
+               bank = &drvdata->pin_banks[i];
                const void __iomem *reg = bank->pctl_base + bank->pctl_offset;
                const u8 *offs = bank->type->reg_offset;
                const u8 *widths = bank->type->fld_width;
@@ -1371,10 +1372,14 @@ static int __maybe_unused samsung_pinctrl_suspend(struct device *dev)
                }
        }
 
+       for (i = 0; i < drvdata->nr_banks; i++) {
+               bank = &drvdata->pin_banks[i];
+               if (drvdata->suspend)
+                       drvdata->suspend(bank);
+       }
+
        clk_disable(drvdata->pclk);
 
-       if (drvdata->suspend)
-               drvdata->suspend(drvdata);
        if (drvdata->retention_ctrl && drvdata->retention_ctrl->enable)
                drvdata->retention_ctrl->enable(drvdata);
 
@@ -1392,6 +1397,7 @@ static int __maybe_unused samsung_pinctrl_suspend(struct device *dev)
 static int __maybe_unused samsung_pinctrl_resume(struct device *dev)
 {
        struct samsung_pinctrl_drv_data *drvdata = dev_get_drvdata(dev);
+       struct samsung_pin_bank *bank;
        int ret;
        int i;
 
@@ -1406,11 +1412,14 @@ static int __maybe_unused samsung_pinctrl_resume(struct device *dev)
                return ret;
        }
 
-       if (drvdata->resume)
-               drvdata->resume(drvdata);
+       for (i = 0; i < drvdata->nr_banks; i++) {
+               bank = &drvdata->pin_banks[i];
+               if (drvdata->resume)
+                       drvdata->resume(bank);
+       }
 
        for (i = 0; i < drvdata->nr_banks; i++) {
-               struct samsung_pin_bank *bank = &drvdata->pin_banks[i];
+               bank = &drvdata->pin_banks[i];
                void __iomem *reg = bank->pctl_base + bank->pctl_offset;
                const u8 *offs = bank->type->reg_offset;
                const u8 *widths = bank->type->fld_width;
index 3cf758df7d69127a1b012105eebcfbba45c993f2..fcc57c244d167db1de8c7aceffa6a9e7484bf348 100644 (file)
@@ -285,8 +285,8 @@ struct samsung_pin_ctrl {
        int             (*eint_gpio_init)(struct samsung_pinctrl_drv_data *);
        int             (*eint_wkup_init)(struct samsung_pinctrl_drv_data *);
        void            (*pud_value_init)(struct samsung_pinctrl_drv_data *drvdata);
-       void            (*suspend)(struct samsung_pinctrl_drv_data *);
-       void            (*resume)(struct samsung_pinctrl_drv_data *);
+       void            (*suspend)(struct samsung_pin_bank *bank);
+       void            (*resume)(struct samsung_pin_bank *bank);
 };
 
 /**
@@ -335,8 +335,8 @@ struct samsung_pinctrl_drv_data {
 
        struct samsung_retention_ctrl   *retention_ctrl;
 
-       void (*suspend)(struct samsung_pinctrl_drv_data *);
-       void (*resume)(struct samsung_pinctrl_drv_data *);
+       void (*suspend)(struct samsung_pin_bank *bank);
+       void (*resume)(struct samsung_pin_bank *bank);
 };
 
 /**