]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
arm64: dts: imx952: Describe Mali G310 GPU
authorGuangliu Ding <guangliu.ding@nxp.com>
Tue, 7 Apr 2026 03:15:03 +0000 (11:15 +0800)
committerFrank Li <Frank.Li@nxp.com>
Tue, 5 May 2026 19:48:02 +0000 (15:48 -0400)
Support Mali G310 GPU on i.MX952 board. Describe this GPU in the DT.
Include dummy GPU voltage regulator and OPP tables.

A hardware GPU auto clock‑gating mechanism has been introduced, enabling
GPUMIX to automatically manage the GPU clock. This improves overall
response time.

Signed-off-by: Guangliu Ding <guangliu.ding@nxp.com>
Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
arch/arm64/boot/dts/freescale/imx952.dtsi

index b30707837f353320d16077fa5b14efb8262ead4d..8d65c380e1c43d9f44c78eccc7be32fbbf6e8093 100644 (file)
                clock-names = "main_clk";
        };
 
+       gpu_opp_table: opp-table {
+               compatible = "operating-points-v2";
+
+               opp-500000000 {
+                       opp-hz = /bits/ 64 <500000000>;
+                       opp-hz-real = /bits/ 64 <500000000>;
+                       opp-microvolt = <920000>;
+               };
+
+               opp-800000000 {
+                       opp-hz = /bits/ 64 <800000000>;
+                       opp-hz-real = /bits/ 64 <800000000>;
+                       opp-microvolt = <920000>;
+               };
+
+               opp-1000000000 {
+                       opp-hz = /bits/ 64 <1000000000>;
+                       opp-hz-real = /bits/ 64 <1000000000>;
+                       opp-microvolt = <920000>;
+               };
+       };
+
        soc {
                compatible = "simple-bus";
                #address-cells = <2>;
                        power-domains = <&scmi_devpd IMX952_PD_NETC>;
                        status = "disabled";
                };
+
+               gpu: gpu@4d900000 {
+                       compatible = "nxp,imx95-mali", "arm,mali-valhall-csf";
+                       reg = <0 0x4d900000 0 0x480000>;
+                       interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "job", "mmu", "gpu";
+                       clocks = <&scmi_clk IMX952_CLK_GPU>;
+                       clock-names = "core";
+                       power-domains = <&scmi_devpd IMX952_PD_GPU>;
+                       operating-points-v2 = <&gpu_opp_table>;
+                       dynamic-power-coefficient = <1013>;
+               };
        };
 };