drm/amd/pm: Replace without wait with async calls

Use the new async locked message function instead of without_waiting
messaging function.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
index 9ea6b0d1954b84cafc8e690ea41c16ebe3724d7a..087b4b6ce857538f76d7c8145f35e90913a095d2 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
@@ -3043,21 +3043,21 @@ static int sienna_cichlid_stb_get_data_direct(struct smu_context *smu,
 
 static int sienna_cichlid_mode2_reset(struct smu_context *smu)
 {
-       int ret = 0, index;
+       struct smu_msg_ctl *ctl = &smu->msg_ctl;
        struct amdgpu_device *adev = smu->adev;
+       int ret = 0;
        int timeout = 100;
 
-       index = smu_cmn_to_asic_specific_index(smu, CMN2ASIC_MAPPING_MSG,
-                                               SMU_MSG_DriverMode2Reset);
-
-       mutex_lock(&smu->message_lock);
+       mutex_lock(&ctl->lock);
 
-       ret = smu_cmn_send_msg_without_waiting(smu, (uint16_t)index,
-                                              SMU_RESET_MODE_2);
+       ret = smu_msg_send_async_locked(ctl, SMU_MSG_DriverMode2Reset,
+                                       SMU_RESET_MODE_2);
+       if (ret)
+               goto out;
 
-       ret = smu_cmn_wait_for_response(smu);
+       ret = smu_msg_wait_response(ctl, 0);
        while (ret != 0 && timeout) {
-               ret = smu_cmn_wait_for_response(smu);
+               ret = smu_msg_wait_response(ctl, 0);
                /* Wait a bit more time for getting ACK */
                if (ret != 0) {
                        --timeout;
@@ -3075,11 +3075,11 @@ static int sienna_cichlid_mode2_reset(struct smu_context *smu)
                goto out;
        }
 
-       dev_info(smu->adev->dev, "restore config space...\n");
+       dev_info(adev->dev, "restore config space...\n");
        /* Restore the config space saved during init */
        amdgpu_device_load_pci_state(adev->pdev);
 out:
-       mutex_unlock(&smu->message_lock);
+       mutex_unlock(&ctl->lock);
 
        return ret;
 }

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
index a645094b029b3ae943e52d2be3b43297f0ccedf7..fe1924289040cd119871db822aa28ca3bfbe0eca 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
@@ -2272,18 +2272,12 @@ static int vangogh_post_smu_init(struct smu_context *smu)
 
 static int vangogh_mode_reset(struct smu_context *smu, int type)
 {
-       int ret = 0, index = 0;
-
-       index = smu_cmn_to_asic_specific_index(smu, CMN2ASIC_MAPPING_MSG,
-                                              SMU_MSG_GfxDeviceDriverReset);
-       if (index < 0)
-               return index == -EACCES ? 0 : index;
-
-       mutex_lock(&smu->message_lock);
-
-       ret = smu_cmn_send_msg_without_waiting(smu, (uint16_t)index, type);
+       struct smu_msg_ctl *ctl = &smu->msg_ctl;
+       int ret;
 
-       mutex_unlock(&smu->message_lock);
+       mutex_lock(&ctl->lock);
+       ret = smu_msg_send_async_locked(ctl, SMU_MSG_GfxDeviceDriverReset, type);
+       mutex_unlock(&ctl->lock);
 
        mdelay(10);
 

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
index a3f4b25ac474e6a204d58b89d747cf2e6455ae1f..76edb54972dc2d3157593a13b297c982ac2bd6bf 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
@@ -1828,26 +1828,28 @@ static int aldebaran_mode1_reset(struct smu_context *smu)
 
 static int aldebaran_mode2_reset(struct smu_context *smu)
 {
-       int ret = 0, index;
+       struct smu_msg_ctl *ctl = &smu->msg_ctl;
        struct amdgpu_device *adev = smu->adev;
+       int ret = 0;
        int timeout = 10;
 
-       index = smu_cmn_to_asic_specific_index(smu, CMN2ASIC_MAPPING_MSG,
-                                               SMU_MSG_GfxDeviceDriverReset);
-       if (index < 0 )
-               return -EINVAL;
-       mutex_lock(&smu->message_lock);
+       mutex_lock(&ctl->lock);
+
        if (smu->smc_fw_version >= 0x00441400) {
-               ret = smu_cmn_send_msg_without_waiting(smu, (uint16_t)index, SMU_RESET_MODE_2);
+               ret = smu_msg_send_async_locked(ctl, SMU_MSG_GfxDeviceDriverReset,
+                                               SMU_RESET_MODE_2);
+               if (ret)
+                       goto out;
+
                /* This is similar to FLR, wait till max FLR timeout */
                msleep(100);
-               dev_dbg(smu->adev->dev, "restore config space...\n");
+               dev_dbg(adev->dev, "restore config space...\n");
                /* Restore the config space saved during init */
                amdgpu_device_load_pci_state(adev->pdev);
 
-               dev_dbg(smu->adev->dev, "wait for reset ack\n");
+               dev_dbg(adev->dev, "wait for reset ack\n");
                while (ret == -ETIME && timeout)  {
-                       ret = smu_cmn_wait_for_response(smu);
+                       ret = smu_msg_wait_response(ctl, 0);
                        /* Wait a bit more time for getting ACK */
                        if (ret == -ETIME) {
                                --timeout;
@@ -1870,7 +1872,7 @@ static int aldebaran_mode2_reset(struct smu_context *smu)
        if (ret == 1)
                ret = 0;
 out:
-       mutex_unlock(&smu->message_lock);
+       mutex_unlock(&ctl->lock);
 
        return ret;
 }

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
index e5996162fd5cdacb05792e65c505fa282d5e002a..b941ab24f8238acaefdf80747e8828ac8c06018a 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
@@ -2244,18 +2244,21 @@ int smu_v13_0_baco_exit(struct smu_context *smu)
 
 int smu_v13_0_set_gfx_power_up_by_imu(struct smu_context *smu)
 {
-       uint16_t index;
+       struct smu_msg_ctl *ctl = &smu->msg_ctl;
        struct amdgpu_device *adev = smu->adev;
+       int ret;
 
        if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) {
                return smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_EnableGfxImu,
                                                       ENABLE_IMU_ARG_GFXOFF_ENABLE, NULL);
        }
 
-       index = smu_cmn_to_asic_specific_index(smu, CMN2ASIC_MAPPING_MSG,
-                                              SMU_MSG_EnableGfxImu);
-       return smu_cmn_send_msg_without_waiting(smu, index,
-                                               ENABLE_IMU_ARG_GFXOFF_ENABLE);
+       mutex_lock(&ctl->lock);
+       ret = smu_msg_send_async_locked(ctl, SMU_MSG_EnableGfxImu,
+                                       ENABLE_IMU_ARG_GFXOFF_ENABLE);
+       mutex_unlock(&ctl->lock);
+
+       return ret;
 }
 
 int smu_v13_0_od_edit_dpm_table(struct smu_context *smu,

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
index a9789f3a23b0b029f20fa571a588eaad81ff47c6..cf011fc3bb618b801fe817ef2720bbf287a15b40 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
@@ -2897,24 +2897,22 @@ static void smu_v13_0_6_restore_pci_config(struct smu_context *smu)
 
 static int smu_v13_0_6_mode2_reset(struct smu_context *smu)
 {
-       int ret = 0, index;
+       struct smu_msg_ctl *ctl = &smu->msg_ctl;
        struct amdgpu_device *adev = smu->adev;
+       int ret = 0;
        int timeout = 10;
 
-       index = smu_cmn_to_asic_specific_index(smu, CMN2ASIC_MAPPING_MSG,
-                                              SMU_MSG_GfxDeviceDriverReset);
-       if (index < 0)
-               return index;
-
-       mutex_lock(&smu->message_lock);
+       mutex_lock(&ctl->lock);
 
-       ret = smu_cmn_send_msg_without_waiting(smu, (uint16_t)index,
-                                              SMU_RESET_MODE_2);
+       ret = smu_msg_send_async_locked(ctl, SMU_MSG_GfxDeviceDriverReset,
+                                       SMU_RESET_MODE_2);
+       if (ret)
+               goto out;
 
        /* Reset takes a bit longer, wait for 200ms. */
        msleep(200);
 
-       dev_dbg(smu->adev->dev, "restore config space...\n");
+       dev_dbg(adev->dev, "restore config space...\n");
        /* Restore the config space saved during init */
        amdgpu_device_load_pci_state(adev->pdev);
 
@@ -2932,9 +2930,9 @@ static int smu_v13_0_6_mode2_reset(struct smu_context *smu)
        if (!(adev->flags & AMD_IS_APU))
                smu_v13_0_6_restore_pci_config(smu);
 
-       dev_dbg(smu->adev->dev, "wait for reset ack\n");
+       dev_dbg(adev->dev, "wait for reset ack\n");
        do {
-               ret = smu_cmn_wait_for_response(smu);
+               ret = smu_msg_wait_response(ctl, 0);
                /* Wait a bit more time for getting ACK */
                if (ret == -ETIME) {
                        --timeout;
@@ -2948,7 +2946,7 @@ static int smu_v13_0_6_mode2_reset(struct smu_context *smu)
        } while (ret == -ETIME && timeout);
 
 out:
-       mutex_unlock(&smu->message_lock);
+       mutex_unlock(&ctl->lock);
 
        if (ret)
                dev_err(adev->dev, "failed to send mode2 reset, error code %d",

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c
index 8f7f293de3d80d319b6c04a045430ee0dcd9feb9..f85ba23f9d99add2f954b8a99b7f70179830f330 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c
@@ -1834,17 +1834,21 @@ int smu_v14_0_baco_exit(struct smu_context *smu)
 
 int smu_v14_0_set_gfx_power_up_by_imu(struct smu_context *smu)
 {
-       uint16_t index;
+       struct smu_msg_ctl *ctl = &smu->msg_ctl;
        struct amdgpu_device *adev = smu->adev;
+       int ret;
 
        if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) {
                return smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_EnableGfxImu,
                                                       ENABLE_IMU_ARG_GFXOFF_ENABLE, NULL);
        }
 
-       index = smu_cmn_to_asic_specific_index(smu, CMN2ASIC_MAPPING_MSG,
-                                              SMU_MSG_EnableGfxImu);
-       return smu_cmn_send_msg_without_waiting(smu, index, ENABLE_IMU_ARG_GFXOFF_ENABLE);
+       mutex_lock(&ctl->lock);
+       ret = smu_msg_send_async_locked(ctl, SMU_MSG_EnableGfxImu,
+                                       ENABLE_IMU_ARG_GFXOFF_ENABLE);
+       mutex_unlock(&ctl->lock);
+
+       return ret;
 }
 
 int smu_v14_0_set_default_dpm_tables(struct smu_context *smu)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c
index 631bdf38716390ab8bb9f124c9612ce300fe5893..6557085a7c728a717391e4e09df95b7b7617e83b 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c
@@ -1709,17 +1709,21 @@ int smu_v15_0_baco_exit(struct smu_context *smu)
 
 int smu_v15_0_set_gfx_power_up_by_imu(struct smu_context *smu)
 {
-       uint16_t index;
+       struct smu_msg_ctl *ctl = &smu->msg_ctl;
        struct amdgpu_device *adev = smu->adev;
+       int ret;
 
        if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) {
                return smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_EnableGfxImu,
                                                       ENABLE_IMU_ARG_GFXOFF_ENABLE, NULL);
        }
 
-       index = smu_cmn_to_asic_specific_index(smu, CMN2ASIC_MAPPING_MSG,
-                                              SMU_MSG_EnableGfxImu);
-       return smu_cmn_send_msg_without_waiting(smu, index, ENABLE_IMU_ARG_GFXOFF_ENABLE);
+       mutex_lock(&ctl->lock);
+       ret = smu_msg_send_async_locked(ctl, SMU_MSG_EnableGfxImu,
+                                       ENABLE_IMU_ARG_GFXOFF_ENABLE);
+       mutex_unlock(&ctl->lock);
+
+       return ret;
 }
 
 int smu_v15_0_set_default_dpm_tables(struct smu_context *smu)