re PR target/40153 (Long long comparison optimized away incorrectly in Thumb code.)

	PR target/40153
	* arm.md (cstoresi_nltu_thumb1): Use a neg of ltu as the pattern name
	implies.

From-SVN: r147626

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 7e7649778528dca6c224868f26cf9914e0ab42e7..d1023425ce3ff098e5175ff2df9124a807ed4ed6 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2009-05-16  Richard Earnshaw  <rearnsha@arm.com>
+
+       PR target/40153
+       * arm.md (cstoresi_nltu_thumb1): Use a neg of ltu as the pattern name
+       implies.
+
 2009-05-16  Richard Earnshaw  <rearnsha@arm.com>
 
        * arm.md (movdi2): Copy non-reg values to DImode registers.

diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 1894cec01dc02585b6009db89a4be2fbbc4dee8f..e6ae54393b8b6032f70f1a97a82d702631dc0196 100644 (file)
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -8005,7 +8005,7 @@
 
 (define_insn "cstoresi_nltu_thumb1"
   [(set (match_operand:SI 0 "s_register_operand" "=l,l")
-        (neg:SI (gtu:SI (match_operand:SI 1 "s_register_operand" "l,*h")
+        (neg:SI (ltu:SI (match_operand:SI 1 "s_register_operand" "l,*h")
                        (match_operand:SI 2 "thumb1_cmp_operand" "lI*h,*r"))))]
   "TARGET_THUMB1"
   "cmp\\t%1, %2\;sbc\\t%0, %0, %0"