Add Iop_Add8, Iop_Add16 and other 8 or 16 bit ALU Iop

in the host_tilegx_isel.c

They were removed during the code review. But without
them, the memcheck's vbit-test failed. So, simply add
them back.

-This line, and those below, will be ignored--

M    host_tilegx_isel.c

git-svn-id: svn://svn.valgrind.org/vex/trunk@3133

diff --git a/VEX/priv/host_tilegx_isel.c b/VEX/priv/host_tilegx_isel.c
index 46830a7c3f6f4df28720600d9d8529accfe18165..7e4e6eb45f10810fa8fc4e788f5aa9aed44c16cf 100644 (file)
--- a/VEX/priv/host_tilegx_isel.c
+++ b/VEX/priv/host_tilegx_isel.c
@@ -480,26 +480,36 @@ static HReg iselWordExpr_R_wrk ( ISelEnv * env, IRExpr * e )
 
     switch (e->Iex.Binop.op) {
 
+    case Iop_Add8:
+    case Iop_Add16:
     case Iop_Add32:
     case Iop_Add64:
       aluOp = GXalu_ADD;
       break;
 
+    case Iop_Sub8:
+    case Iop_Sub16:
     case Iop_Sub32:
     case Iop_Sub64:
       aluOp = GXalu_SUB;
       break;
 
+    case Iop_And8:
+    case Iop_And16:
     case Iop_And32:
     case Iop_And64:
       aluOp = GXalu_AND;
       break;
 
+    case Iop_Or8:
+    case Iop_Or16:
     case Iop_Or32:
     case Iop_Or64:
       aluOp = GXalu_OR;
       break;
 
+    case Iop_Xor8:
+    case Iop_Xor16:
     case Iop_Xor32:
     case Iop_Xor64:
       aluOp = GXalu_XOR;