arm64: dts: qcom: sdm630: Use the header with DSI phy clock IDs

Use the header with DSI phy clock IDs to make code more readable.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250408-dts-qcom-dsi-phy-clocks-v2-13-73b482a6dd02@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index 3722e405a97cb096b2085a4a21b3e15f06849271..2d3820536ddf45fc9cd96ffda3e9cc64b1e6ddff 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -4,6 +4,7 @@
  * Copyright (c) 2020, AngeloGioacchino Del Regno <kholk11@gmail.com>
  */
 
+#include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
 #include <dt-bindings/clock/qcom,gcc-sdm660.h>
 #include <dt-bindings/clock/qcom,gpucc-sdm660.h>
 #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
@@ -1541,8 +1542,8 @@
                                        <&sleep_clk>,
                                        <&gcc GCC_MMSS_GPLL0_CLK>,
                                        <&gcc GCC_MMSS_GPLL0_DIV_CLK>,
-                                       <&mdss_dsi0_phy 1>,
-                                       <&mdss_dsi0_phy 0>,
+                                       <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>,
+                                       <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
                                        <0>,
                                        <0>,
                                        <0>,
@@ -1664,8 +1665,8 @@
 
                                assigned-clocks = <&mmcc BYTE0_CLK_SRC>,
                                                  <&mmcc PCLK0_CLK_SRC>;
-                               assigned-clock-parents = <&mdss_dsi0_phy 0>,
-                                                        <&mdss_dsi0_phy 1>;
+                               assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
+                                                        <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>;
 
                                clocks = <&mmcc MDSS_MDP_CLK>,
                                         <&mmcc MDSS_BYTE0_CLK>,

diff --git a/arch/arm64/boot/dts/qcom/sdm660.dtsi b/arch/arm64/boot/dts/qcom/sdm660.dtsi
index 3164a4817e3267d458d81cabf2ae4223a7a94963..ef4a563c0feba7cd651158cdfa1b4d3cb7503c7c 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sdm660.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm660.dtsi
@@ -170,8 +170,8 @@
 
                assigned-clocks = <&mmcc BYTE1_CLK_SRC>,
                                        <&mmcc PCLK1_CLK_SRC>;
-               assigned-clock-parents = <&mdss_dsi1_phy 0>,
-                                               <&mdss_dsi1_phy 1>;
+               assigned-clock-parents = <&mdss_dsi1_phy DSI_BYTE_PLL_CLK>,
+                                        <&mdss_dsi1_phy DSI_PIXEL_PLL_CLK>;
 
                clocks = <&mmcc MDSS_MDP_CLK>,
                                <&mmcc MDSS_BYTE1_CLK>,
@@ -239,10 +239,10 @@
                        <&sleep_clk>,
                        <&gcc GCC_MMSS_GPLL0_CLK>,
                        <&gcc GCC_MMSS_GPLL0_DIV_CLK>,
-                       <&mdss_dsi0_phy 1>,
-                       <&mdss_dsi0_phy 0>,
-                       <&mdss_dsi1_phy 1>,
-                       <&mdss_dsi1_phy 0>,
+                       <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>,
+                       <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
+                       <&mdss_dsi1_phy DSI_PIXEL_PLL_CLK>,
+                       <&mdss_dsi1_phy DSI_BYTE_PLL_CLK>,
                        <0>,
                        <0>;
 };