A bit of whitespace and guard changes relating to VGABI_N32. No functional change...

* coregrind/m_redir.c: whitespace changes only

* memcheck/mc_main.c:
  - change 6 guards of the form "defined (VGABI_N32)" to
    "defined(VGA_mips64) && defined(VGABI_N32)"
  - Fix up poor indentation

diff --git a/coregrind/m_redir.c b/coregrind/m_redir.c
index 660e696096e7aa74fde6f5386790bf76c96c68ec..6bc01b434d3160f936e2e9da037cdec7e2a839ef 100644 (file)
--- a/coregrind/m_redir.c
+++ b/coregrind/m_redir.c
@@ -1577,7 +1577,6 @@ void VG_(redir_initialise) ( void )
 
 #  elif defined(VGP_mips32_linux)
    if (0==VG_(strcmp)("Memcheck", VG_(details).name)) {
-
       /* this is mandatory - can't sanely continue without it */
       add_hardwired_spec(
          "ld.so.1", "strlen",
@@ -1589,19 +1588,17 @@ void VG_(redir_initialise) ( void )
          (Addr)&VG_(mips32_linux_REDIR_FOR_index),
          complain_about_stripped_glibc_ldso
       );
-#  if defined(VGPV_mips32_linux_android)
+#     if defined(VGPV_mips32_linux_android)
       add_hardwired_spec(
          "NONE", "__dl_strlen",
          (Addr)&VG_(mips32_linux_REDIR_FOR_strlen),
          NULL
       );
-#  endif
-
+#     endif
    }
 
 #  elif defined(VGP_mips64_linux)
    if (0==VG_(strcmp)("Memcheck", VG_(details).name)) {
-
       /* this is mandatory - can't sanely continue without it */
       add_hardwired_spec(
          "ld.so.1", "strlen",
@@ -1613,8 +1610,7 @@ void VG_(redir_initialise) ( void )
          (Addr)&VG_(mips64_linux_REDIR_FOR_index),
          complain_about_stripped_glibc_ldso
       );
-
-#if defined(VGABI_64)
+#     if defined(VGABI_64)
       add_hardwired_spec(
          "ld-linux-mipsn8.so.1", "strlen",
          (Addr)&VG_(mips64_linux_REDIR_FOR_strlen),
@@ -1625,15 +1621,15 @@ void VG_(redir_initialise) ( void )
          (Addr)&VG_(mips64_linux_REDIR_FOR_index),
          complain_about_stripped_glibc_ldso
       );
-#elif defined(VGABI_N32)
+#     elif defined(VGABI_N32)
       add_hardwired_spec(
          "ld.so.1", "strchr",
          (Addr)&VG_(mips64_linux_REDIR_FOR_index),
          complain_about_stripped_glibc_ldso
       );
-#else
-#error unknown mips64 ABI
-#endif
+#     else
+#     error unknown mips64 ABI
+#     endif
    }
 
 #  elif defined(VGP_x86_solaris)

diff --git a/memcheck/mc_main.c b/memcheck/mc_main.c
index f1dc900c2ae87bb4a2d377cae90d756d1edf7f17..a1edb9a7490b615b68aa318a54bb137ae7ad51e2 100644 (file)
--- a/memcheck/mc_main.c
+++ b/memcheck/mc_main.c
@@ -1393,13 +1393,12 @@ ULong mc_LOADVn_slow ( Addr a, SizeT nBits, Bool bigendian )
       from LOADV64 and LOADV32.
    */
 
-#if defined (VGABI_N32)
-   if (LIKELY(sizeof(void*) == 4
-                      && nBits == 64 && VG_IS_8_ALIGNED(a))) {
-#else
-   if (LIKELY(sizeof(void*) == 8 
-                      && nBits == 64 && VG_IS_8_ALIGNED(a))) {
-#endif
+#  if defined(VGA_mips64) && defined(VGABI_N32)
+   if (LIKELY(sizeof(void*) == 4 && nBits == 64 && VG_IS_8_ALIGNED(a)))
+#  else
+   if (LIKELY(sizeof(void*) == 8 && nBits == 64 && VG_IS_8_ALIGNED(a)))
+#  endif
+   {
       SecMap* sm       = get_secmap_for_reading(a);
       UWord   sm_off16 = SM_OFF_16(a);
       UWord   vabits16 = sm->vabits16[sm_off16];
@@ -1409,13 +1408,13 @@ ULong mc_LOADVn_slow ( Addr a, SizeT nBits, Bool bigendian )
          return V_BITS64_UNDEFINED;
       /* else fall into the slow case */
    }
-#if defined (VGABI_N32)
-   if (LIKELY(sizeof(void*) == 4
-                      && nBits == 32 && VG_IS_4_ALIGNED(a))) {
-#else
-   if (LIKELY(sizeof(void*) == 8 
-                      && nBits == 32 && VG_IS_4_ALIGNED(a))) {
-#endif
+
+#  if defined(VGA_mips64) && defined(VGABI_N32)
+   if (LIKELY(sizeof(void*) == 4 && nBits == 32 && VG_IS_4_ALIGNED(a)))
+#  else
+   if (LIKELY(sizeof(void*) == 8 && nBits == 32 && VG_IS_4_ALIGNED(a)))
+#  endif
+   {
       SecMap* sm = get_secmap_for_reading(a);
       UWord sm_off = SM_OFF(a);
       UWord vabits8 = sm->vabits8[sm_off];
@@ -1425,6 +1424,7 @@ ULong mc_LOADVn_slow ( Addr a, SizeT nBits, Bool bigendian )
          return ((UWord)0xFFFFFFFF00000000ULL | (UWord)V_BITS32_UNDEFINED);
       /* else fall into slow case */
    }
+
    /* ------------ END semi-fast cases ------------ */
 
    ULong  vbits64     = V_BITS64_UNDEFINED; /* result */
@@ -1496,13 +1496,14 @@ ULong mc_LOADVn_slow ( Addr a, SizeT nBits, Bool bigendian )
    /* "at least one of the addresses is invalid" */
    tl_assert(pessim64 != V_BITS64_DEFINED);
 
-#if defined (VGABI_N32)
+#  if defined(VGA_mips64) && defined(VGABI_N32)
    if (szB == VG_WORDSIZE * 2 && VG_IS_WORD_ALIGNED(a)
-       && n_addrs_bad < VG_WORDSIZE * 2) {
-#else
+       && n_addrs_bad < VG_WORDSIZE * 2)
+#  else
    if (szB == VG_WORDSIZE && VG_IS_WORD_ALIGNED(a)
-       && n_addrs_bad < VG_WORDSIZE) {
-#endif
+       && n_addrs_bad < VG_WORDSIZE)
+#  endif
+   {
       /* Exemption applies.  Use the previously computed pessimising
          value for vbits64 and return the combined result, but don't
          flag an addressing error.  The pessimising value is Defined
@@ -1520,13 +1521,14 @@ ULong mc_LOADVn_slow ( Addr a, SizeT nBits, Bool bigendian )
       for this case.  Note that the first clause of the conditional
       (VG_WORDSIZE == 8) is known at compile time, so the whole clause
       will get folded out in 32 bit builds. */
-#if defined (VGABI_N32)
+#  if defined(VGA_mips64) && defined(VGABI_N32)
    if (VG_WORDSIZE == 4
-       && VG_IS_4_ALIGNED(a) && nBits == 32 && n_addrs_bad < 4) {
-#else
+       && VG_IS_4_ALIGNED(a) && nBits == 32 && n_addrs_bad < 4)
+#  else
    if (VG_WORDSIZE == 8
-       && VG_IS_4_ALIGNED(a) && nBits == 32 && n_addrs_bad < 4) {
-#endif
+       && VG_IS_4_ALIGNED(a) && nBits == 32 && n_addrs_bad < 4)
+#  endif
+   {
       tl_assert(V_BIT_UNDEFINED == 1 && V_BIT_DEFINED == 0);
       /* (really need "UifU" here...)
          vbits64 UifU= pessim64  (is pessimised by it, iow) */
@@ -1566,13 +1568,12 @@ void mc_STOREVn_slow ( Addr a, SizeT nBits, ULong vbytes, Bool bigendian )
       is somewhat similar to some cases extensively commented in
       MC_(helperc_STOREV8).
    */
-#if defined (VGABI_N32)
-   if (LIKELY(sizeof(void*) == 4
-                      && nBits == 64 && VG_IS_8_ALIGNED(a))) {
-#else
-   if (LIKELY(sizeof(void*) == 8
-                      && nBits == 64 && VG_IS_8_ALIGNED(a))) {
-#endif
+#  if defined(VGA_mips64) && defined(VGABI_N32)
+   if (LIKELY(sizeof(void*) == 4 && nBits == 64 && VG_IS_8_ALIGNED(a)))
+#  else
+   if (LIKELY(sizeof(void*) == 8 && nBits == 64 && VG_IS_8_ALIGNED(a)))
+#  endif
+   {
       SecMap* sm       = get_secmap_for_reading(a);
       UWord   sm_off16 = SM_OFF_16(a);
       UWord   vabits16 = sm->vabits16[sm_off16];
@@ -1593,13 +1594,13 @@ void mc_STOREVn_slow ( Addr a, SizeT nBits, ULong vbytes, Bool bigendian )
       }
       /* else fall into the slow case */
    }
-#if defined (VGABI_N32)
-   if (LIKELY(sizeof(void*) == 4
-                      && nBits == 32 && VG_IS_4_ALIGNED(a))) {
-#else
-   if (LIKELY(sizeof(void*) == 8
-                      && nBits == 32 && VG_IS_4_ALIGNED(a))) {
-#endif
+
+#  if defined(VGA_mips64) && defined(VGABI_N32)
+   if (LIKELY(sizeof(void*) == 4 && nBits == 32 && VG_IS_4_ALIGNED(a)))
+#  else
+   if (LIKELY(sizeof(void*) == 8 && nBits == 32 && VG_IS_4_ALIGNED(a)))
+#  endif
+   {
       SecMap* sm      = get_secmap_for_reading(a);
       UWord   sm_off  = SM_OFF(a);
       UWord   vabits8 = sm->vabits8[sm_off];