arm64: dts: qcom: sc7180: Drop flags on mdss irqs

[ Upstream commit 51e9874d382e089f664b3ce12773bbbaece5f369 ]

The number of interrupt cells for the mdss interrupt controller is 1,
meaning there should only be one cell for the interrupt number, not two
where the second cell is the irq flags. Drop the second cell to match
the binding.

Cc: Kalyan Thota <kalyan_t@codeaurora.org>
Cc: Harigovindan P <harigovi@codeaurora.org
Fixes: a3db7ad1af49 ("arm64: dts: sc7180: add display dt nodes")
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20200811192503.1811462-1-swboyd@chromium.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index cfeeddcea7887bfb0d944f911556cd76299eaacf..7f1b75b2bcee37a2012684fb291bf77c1d72ef15 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -2357,7 +2357,7 @@
                                                       <19200000>;
 
                                interrupt-parent = <&mdss>;
-                               interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupts = <0>;
 
                                status = "disabled";
 
@@ -2380,7 +2380,7 @@
                                reg-names = "dsi_ctrl";
 
                                interrupt-parent = <&mdss>;
-                               interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupts = <4>;
 
                                clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
                                         <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,