]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
arm64: tegra: Add interconnect properties for Tegra210
authorAaron Kling <webgeek1234@gmail.com>
Wed, 22 Oct 2025 03:13:23 +0000 (22:13 -0500)
committerThierry Reding <treding@nvidia.com>
Fri, 14 Nov 2025 21:55:10 +0000 (22:55 +0100)
Add interconnect properties to the Memory Controller, External Memory
Controller and the Display Controller nodes in order to describe the
hardware interconnection.

Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
arch/arm64/boot/dts/nvidia/tegra210.dtsi

index 1b3fc151e49df0dbd28cb00fea485c2f53a20afb..c196ceed935035fd4acd966cd33aa3d1bea5f11e 100644 (file)
 
                        nvidia,outputs = <&dsia &dsib &sor0 &sor1>;
                        nvidia,head = <0>;
+
+                       interconnects = <&mc TEGRA210_MC_DISPLAY0A &emc>,
+                                       <&mc TEGRA210_MC_DISPLAY0B &emc>,
+                                       <&mc TEGRA210_MC_DISPLAY0C &emc>,
+                                       <&mc TEGRA210_MC_DISPLAYHC &emc>,
+                                       <&mc TEGRA210_MC_DISPLAYD &emc>,
+                                       <&mc TEGRA210_MC_DISPLAYT &emc>;
+                       interconnect-names = "wina",
+                                            "winb",
+                                            "winc",
+                                            "cursor",
+                                            "wind",
+                                            "wint";
                };
 
                dc@54240000 {
 
                        nvidia,outputs = <&dsia &dsib &sor0 &sor1>;
                        nvidia,head = <1>;
+
+                       interconnects = <&mc TEGRA210_MC_DISPLAY0AB &emc>,
+                                       <&mc TEGRA210_MC_DISPLAY0BB &emc>,
+                                       <&mc TEGRA210_MC_DISPLAY0CB &emc>,
+                                       <&mc TEGRA210_MC_DISPLAYHCB &emc>;
+                       interconnect-names = "wina",
+                                            "winb",
+                                            "winc",
+                                            "cursor";
                };
 
                dsia: dsi@54300000 {
 
                #iommu-cells = <1>;
                #reset-cells = <1>;
+               #interconnect-cells = <1>;
        };
 
        emc: external-memory-controller@7001b000 {
                clock-names = "emc";
                interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
                nvidia,memory-controller = <&mc>;
+               #interconnect-cells = <0>;
                #cooling-cells = <2>;
        };