return regmap_write(regmap, bsp_priv->clock_grf_reg, val);
}
-static int rk_set_reg_speed(struct rk_priv_data *bsp_priv,
- phy_interface_t interface, int speed)
-{
- unsigned int val;
- int ret;
-
- if (phy_interface_mode_is_rgmii(interface)) {
- ret = rk_gmac_rgmii_clk_div(speed);
- if (ret < 0)
- return ret;
-
- val = rk_encode_wm16(ret, bsp_priv->clock.gmii_clk_sel_mask);
- } else if (interface == PHY_INTERFACE_MODE_RMII) {
- val = rk_encode_wm16(speed == SPEED_100,
- bsp_priv->clock.mac_speed_mask) |
- rk_encode_wm16(speed == SPEED_100,
- bsp_priv->clock.rmii_clk_sel_mask);
- } else {
- /* This should never happen, as .get_interfaces() limits
- * the interface modes that are supported to RGMII and/or
- * RMII.
- */
- return -EINVAL;
- }
-
- rk_write_clock_grf_reg(bsp_priv, val);
-
- return 0;
-
-}
-
static int rk_set_clk_mac_speed(struct rk_priv_data *bsp_priv,
phy_interface_t interface, int speed)
{
{
}
-static int rk3128_set_speed(struct rk_priv_data *bsp_priv,
- phy_interface_t interface, int speed)
-{
- return rk_set_reg_speed(bsp_priv, interface, speed);
-}
-
static const struct rk_gmac_ops rk3128_ops = {
.set_to_rgmii = rk3128_set_to_rgmii,
.set_to_rmii = rk3128_set_to_rmii,
- .set_speed = rk3128_set_speed,
.gmac_grf_reg = RK3128_GRF_MAC_CON1,
.gmac_phy_intf_sel_mask = GENMASK_U16(8, 6),
regmap_write(bsp_priv->grf, RK3228_GRF_MAC_CON1, GRF_BIT(11));
}
-static int rk3228_set_speed(struct rk_priv_data *bsp_priv,
- phy_interface_t interface, int speed)
-{
- return rk_set_reg_speed(bsp_priv, interface, speed);
-}
-
static void rk3228_integrated_phy_powerup(struct rk_priv_data *priv)
{
regmap_write(priv->grf, RK3228_GRF_CON_MUX,
static const struct rk_gmac_ops rk3228_ops = {
.set_to_rgmii = rk3228_set_to_rgmii,
.set_to_rmii = rk3228_set_to_rmii,
- .set_speed = rk3228_set_speed,
.integrated_phy_powerup = rk3228_integrated_phy_powerup,
.integrated_phy_powerdown = rk_gmac_integrated_ephy_powerdown,
{
}
-static int rk3288_set_speed(struct rk_priv_data *bsp_priv,
- phy_interface_t interface, int speed)
-{
- return rk_set_reg_speed(bsp_priv, interface, speed);
-}
-
static const struct rk_gmac_ops rk3288_ops = {
.set_to_rgmii = rk3288_set_to_rgmii,
.set_to_rmii = rk3288_set_to_rmii,
- .set_speed = rk3288_set_speed,
.gmac_grf_reg = RK3288_GRF_SOC_CON1,
.gmac_phy_intf_sel_mask = GENMASK_U16(8, 6),
{
}
-static int rk3308_set_speed(struct rk_priv_data *bsp_priv,
- phy_interface_t interface, int speed)
-{
- return rk_set_reg_speed(bsp_priv, interface, speed);
-}
-
static const struct rk_gmac_ops rk3308_ops = {
.set_to_rmii = rk3308_set_to_rmii,
- .set_speed = rk3308_set_speed,
.gmac_grf_reg = RK3308_GRF_MAC_CON0,
.gmac_phy_intf_sel_mask = GENMASK_U16(4, 2),
{
}
-static int rk3328_set_speed(struct rk_priv_data *bsp_priv,
- phy_interface_t interface, int speed)
-{
- return rk_set_reg_speed(bsp_priv, interface, speed);
-}
-
static void rk3328_integrated_phy_powerup(struct rk_priv_data *priv)
{
regmap_write(priv->grf, RK3328_GRF_MACPHY_CON1,
.init = rk3328_init,
.set_to_rgmii = rk3328_set_to_rgmii,
.set_to_rmii = rk3328_set_to_rmii,
- .set_speed = rk3328_set_speed,
.integrated_phy_powerup = rk3328_integrated_phy_powerup,
.integrated_phy_powerdown = rk_gmac_integrated_ephy_powerdown,
{
}
-static int rk3366_set_speed(struct rk_priv_data *bsp_priv,
- phy_interface_t interface, int speed)
-{
- return rk_set_reg_speed(bsp_priv, interface, speed);
-}
-
static const struct rk_gmac_ops rk3366_ops = {
.set_to_rgmii = rk3366_set_to_rgmii,
.set_to_rmii = rk3366_set_to_rmii,
- .set_speed = rk3366_set_speed,
.gmac_grf_reg = RK3366_GRF_SOC_CON6,
.gmac_phy_intf_sel_mask = GENMASK_U16(11, 9),
{
}
-static int rk3368_set_speed(struct rk_priv_data *bsp_priv,
- phy_interface_t interface, int speed)
-{
- return rk_set_reg_speed(bsp_priv, interface, speed);
-}
-
static const struct rk_gmac_ops rk3368_ops = {
.set_to_rgmii = rk3368_set_to_rgmii,
.set_to_rmii = rk3368_set_to_rmii,
- .set_speed = rk3368_set_speed,
.gmac_grf_reg = RK3368_GRF_SOC_CON15,
.gmac_phy_intf_sel_mask = GENMASK_U16(11, 9),
{
}
-static int rk3399_set_speed(struct rk_priv_data *bsp_priv,
- phy_interface_t interface, int speed)
-{
- return rk_set_reg_speed(bsp_priv, interface, speed);
-}
-
static const struct rk_gmac_ops rk3399_ops = {
.set_to_rgmii = rk3399_set_to_rgmii,
.set_to_rmii = rk3399_set_to_rmii,
- .set_speed = rk3399_set_speed,
.gmac_grf_reg = RK3399_GRF_SOC_CON5,
.gmac_phy_intf_sel_mask = GENMASK_U16(11, 9),
regmap_write(bsp_priv->grf, offset, RK3506_GMAC_RMII_MODE);
}
-static int rk3506_set_speed(struct rk_priv_data *bsp_priv,
- phy_interface_t interface, int speed)
-{
- return rk_set_reg_speed(bsp_priv, interface, speed);
-}
-
static void rk3506_set_clock_selection(struct rk_priv_data *bsp_priv,
bool input, bool enable)
{
static const struct rk_gmac_ops rk3506_ops = {
.init = rk3506_init,
.set_to_rmii = rk3506_set_to_rmii,
- .set_speed = rk3506_set_speed,
.set_clock_selection = rk3506_set_clock_selection,
.clock.rmii_clk_sel_mask = BIT_U16(3),
RK3528_GMAC0_PHY_INTF_SEL_RMII);
}
-static int rk3528_set_speed(struct rk_priv_data *bsp_priv,
- phy_interface_t interface, int speed)
-{
- return rk_set_reg_speed(bsp_priv, interface, speed);
-}
-
static void rk3528_set_clock_selection(struct rk_priv_data *bsp_priv,
bool input, bool enable)
{
.init = rk3528_init,
.set_to_rgmii = rk3528_set_to_rgmii,
.set_to_rmii = rk3528_set_to_rmii,
- .set_speed = rk3528_set_speed,
.set_clock_selection = rk3528_set_clock_selection,
.integrated_phy_powerup = rk3528_integrated_phy_powerup,
.integrated_phy_powerdown = rk3528_integrated_phy_powerdown,
{
}
-static int rk3576_set_gmac_speed(struct rk_priv_data *bsp_priv,
- phy_interface_t interface, int speed)
-{
- return rk_set_reg_speed(bsp_priv, interface, speed);
-}
-
static void rk3576_set_clock_selection(struct rk_priv_data *bsp_priv, bool input,
bool enable)
{
.init = rk3576_init,
.set_to_rgmii = rk3576_set_to_rgmii,
.set_to_rmii = rk3576_set_to_rmii,
- .set_speed = rk3576_set_gmac_speed,
.set_clock_selection = rk3576_set_clock_selection,
.gmac_rmii_mode_mask = BIT_U16(3),
RK3588_GMAC_CLK_RMII_MODE(bsp_priv->id));
}
-static int rk3588_set_gmac_speed(struct rk_priv_data *bsp_priv,
- phy_interface_t interface, int speed)
-{
- return rk_set_reg_speed(bsp_priv, interface, speed);
-}
-
static void rk3588_set_clock_selection(struct rk_priv_data *bsp_priv, bool input,
bool enable)
{
.init = rk3588_init,
.set_to_rgmii = rk3588_set_to_rgmii,
.set_to_rmii = rk3588_set_to_rmii,
- .set_speed = rk3588_set_gmac_speed,
.set_clock_selection = rk3588_set_clock_selection,
.gmac_grf_reg_in_php = true,
{
}
-static int rv1108_set_speed(struct rk_priv_data *bsp_priv,
- phy_interface_t interface, int speed)
-{
- return rk_set_reg_speed(bsp_priv, interface, speed);
-}
-
static const struct rk_gmac_ops rv1108_ops = {
.set_to_rmii = rv1108_set_to_rmii,
- .set_speed = rv1108_set_speed,
.gmac_grf_reg = RV1108_GRF_GMAC_CON0,
.gmac_phy_intf_sel_mask = GENMASK_U16(6, 4),
phy_interface_t interface, int speed)
{
struct rk_priv_data *bsp_priv = bsp_priv_;
+ int ret = -EINVAL;
+ bool is_100m;
+ u32 val;
- if (bsp_priv->ops->set_speed)
- return bsp_priv->ops->set_speed(bsp_priv, interface, speed);
+ if (bsp_priv->ops->set_speed) {
+ ret = bsp_priv->ops->set_speed(bsp_priv, interface, speed);
+ if (ret < 0)
+ return ret;
+ }
- return -EINVAL;
+ if (phy_interface_mode_is_rgmii(interface) &&
+ bsp_priv->clock.gmii_clk_sel_mask) {
+ ret = rk_gmac_rgmii_clk_div(speed);
+ if (ret < 0)
+ return ret;
+
+ val = rk_encode_wm16(ret, bsp_priv->clock.gmii_clk_sel_mask);
+
+ ret = rk_write_clock_grf_reg(bsp_priv, val);
+ } else if (interface == PHY_INTERFACE_MODE_RMII &&
+ (bsp_priv->clock.rmii_clk_sel_mask ||
+ bsp_priv->clock.mac_speed_mask)) {
+ is_100m = speed == SPEED_100;
+ val = rk_encode_wm16(is_100m, bsp_priv->clock.mac_speed_mask) |
+ rk_encode_wm16(is_100m,
+ bsp_priv->clock.rmii_clk_sel_mask);
+
+ ret = rk_write_clock_grf_reg(bsp_priv, val);
+ }
+
+ return ret;
}
static int rk_gmac_suspend(struct device *dev, void *bsp_priv_)