]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: renesas: Add CN15 eMMC and SD overlays for RZ/V2H and RZ/V2N EVKs
authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Fri, 27 Jun 2025 19:37:42 +0000 (20:37 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Wed, 2 Jul 2025 19:24:33 +0000 (21:24 +0200)
Introduce device tree overlays for supporting the eMMC (RTK0EF0186B02000BJ)
and microSD (RTK0EF0186B01000BJ) sub-boards connected via the CN15
connector on the RZ/V2H and RZ/V2N evaluation kits.

These overlays enable SDHI0 with appropriate pin control settings, power
regulators, and GPIO handling. Both sub-boards are supported using shared
overlay files that can be applied to either EVK due to their identical
connector layout and interface support.

To support this, new DT overlay files are added:
- `rzv2-evk-cn15-emmc.dtso` for eMMC
- `rzv2-evk-cn15-sd.dtso` for microSD

Additionally, the base DTS files for both EVKs are updated to include a
fixed 1.8V regulator (`reg_1p8v`) needed by the eMMC sub-board and
potential future use cases such as HDMI output.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250627193742.110818-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/Makefile
arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts
arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts
arch/arm64/boot/dts/renesas/rzv2-evk-cn15-emmc.dtso [new file with mode: 0644]
arch/arm64/boot/dts/renesas/rzv2-evk-cn15-sd.dtso [new file with mode: 0644]

index cbd0202c4a1744e9f822c62bb5239a39688b950c..ab2ab3ffd693fbc72b003ba593d4c18f0c4c0a68 100644 (file)
@@ -163,8 +163,20 @@ r9a09g047e57-smarc-cru-csi-ov5645-dtbs := r9a09g047e57-smarc.dtb r9a09g047e57-sm
 dtb-$(CONFIG_ARCH_R9A09G047) += r9a09g047e57-smarc-cru-csi-ov5645.dtb
 
 dtb-$(CONFIG_ARCH_R9A09G056) += r9a09g056n48-rzv2n-evk.dtb
+dtb-$(CONFIG_ARCH_R9A09G056) += rzv2-evk-cn15-emmc.dtbo
+r9a09g056n48-rzv2n-evk-cn15-emmc-dtbs := r9a09g056n48-rzv2n-evk.dtb rzv2-evk-cn15-emmc.dtbo
+dtb-$(CONFIG_ARCH_R9A09G056) += r9a09g056n48-rzv2n-evk-cn15-emmc.dtb
+dtb-$(CONFIG_ARCH_R9A09G056) += rzv2-evk-cn15-sd.dtbo
+r9a09g056n48-rzv2n-evk-cn15-sd-dtbs := r9a09g056n48-rzv2n-evk.dtb rzv2-evk-cn15-sd.dtbo
+dtb-$(CONFIG_ARCH_R9A09G056) += r9a09g056n48-rzv2n-evk-cn15-sd.dtb
 
 dtb-$(CONFIG_ARCH_R9A09G057) += r9a09g057h44-rzv2h-evk.dtb
+dtb-$(CONFIG_ARCH_R9A09G057) += rzv2-evk-cn15-emmc.dtbo
+r9a09g057h44-rzv2h-evk-cn15-emmc-dtbs := r9a09g057h44-rzv2h-evk.dtb rzv2-evk-cn15-emmc.dtbo
+dtb-$(CONFIG_ARCH_R9A09G057) += r9a09g057h44-rzv2h-evk-cn15-emmc.dtb
+dtb-$(CONFIG_ARCH_R9A09G057) += rzv2-evk-cn15-sd.dtbo
+r9a09g057h44-rzv2h-evk-cn15-sd-dtbs := r9a09g057h44-rzv2h-evk.dtb rzv2-evk-cn15-sd.dtbo
+dtb-$(CONFIG_ARCH_R9A09G057) += r9a09g057h44-rzv2h-evk-cn15-sd.dtb
 dtb-$(CONFIG_ARCH_R9A09G057) += r9a09g057h48-kakip.dtb
 
 dtb-$(CONFIG_ARCH_RCAR_GEN3) += draak-ebisu-panel-aa104xd12.dtbo
index 40014044bbc70b77802a36d8974fc85210ac030a..5829b9afaa95ddb7dee37c0aa2529cd3ebb4efd9 100644 (file)
                regulator-always-on;
        };
 
+       reg_1p8v: regulator-1p8v {
+               compatible = "regulator-fixed";
+               regulator-name = "fixed-1.8V";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+
        reg_3p3v: regulator-3p3v {
                compatible = "regulator-fixed";
                regulator-name = "fixed-3.3V";
index ae021546d895d7a2390bbd487f4459206aad2079..886ce31c1674600be2f21118d911b43442b998bc 100644 (file)
                regulator-always-on;
        };
 
+       reg_1p8v: regulator-1p8v {
+               compatible = "regulator-fixed";
+               regulator-name = "fixed-1.8V";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+
        reg_3p3v: regulator-3p3v {
                compatible = "regulator-fixed";
 
diff --git a/arch/arm64/boot/dts/renesas/rzv2-evk-cn15-emmc.dtso b/arch/arm64/boot/dts/renesas/rzv2-evk-cn15-emmc.dtso
new file mode 100644 (file)
index 0000000..eda2b31
--- /dev/null
@@ -0,0 +1,50 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Shared DT overlay for the eMMC Sub Board (RTK0EF0186B02000BJ), which
+ * is connected to the CN15 connector on the RZ/V2H and RZ/V2N EVKs.
+ *
+ * Copyright (C) 2025 Renesas Electronics Corp.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
+
+&{/} {
+       aliases {
+               mmc0 = "/soc/mmc@15c00000";
+       };
+};
+
+&pinctrl {
+       sdhi0_emmc_pins: emmc-pins {
+               sd0-clk {
+                       pins = "SD0CLK";
+                       renesas,output-impedance = <3>;
+                       slew-rate = <0>;
+               };
+
+               sd0-dat-cmd {
+                       pins = "SD0DAT0", "SD0DAT1", "SD0DAT2", "SD0DAT3", "SD0DAT4",
+                              "SD0DAT5", "SD0DAT6", "SD0DAT7", "SD0CMD";
+                       input-enable;
+                       renesas,output-impedance = <3>;
+                       slew-rate = <0>;
+               };
+       };
+};
+
+&sdhi0 {
+       pinctrl-0 = <&sdhi0_emmc_pins>;
+       pinctrl-1 = <&sdhi0_emmc_pins>;
+       pinctrl-names = "default", "state_uhs";
+       vmmc-supply = <&reg_3p3v>;
+       vqmmc-supply = <&reg_1p8v>;
+       bus-width = <8>;
+       mmc-hs200-1_8v;
+       non-removable;
+       fixed-emmc-driver-type = <1>;
+       status = "okay";
+};
diff --git a/arch/arm64/boot/dts/renesas/rzv2-evk-cn15-sd.dtso b/arch/arm64/boot/dts/renesas/rzv2-evk-cn15-sd.dtso
new file mode 100644 (file)
index 0000000..0af1e0a
--- /dev/null
@@ -0,0 +1,69 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Shared DT overlay for the microSD Sub Board (RTK0EF0186B01000BJ), which
+ * is connected to the CN15 connector on the RZ/V2H and RZ/V2N EVKs.
+ *
+ * Copyright (C) 2025 Renesas Electronics Corp.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
+
+&{/} {
+       aliases {
+               mmc0 = "/soc/mmc@15c00000";
+       };
+
+       vqmmc_sdhi0: regulator-vqmmc-sdhi0 {
+               compatible = "regulator-gpio";
+               regulator-name = "SDHI0 VqmmC";
+               gpios = <&pinctrl RZG2L_GPIO(10, 0) GPIO_ACTIVE_HIGH>;
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <3300000>;
+               gpios-states = <0>;
+               states = <3300000 0>, <1800000 1>;
+       };
+};
+
+&pinctrl {
+       sdhi0-pwr-en-hog {
+               gpio-hog;
+               gpios = <RZG2L_GPIO(10, 1) GPIO_ACTIVE_HIGH>;
+               output-high;
+               line-name = "sd0_pwr_en";
+       };
+
+       sdhi0_pins: sd0 {
+               sd0-cd {
+                       pinmux = <RZG2L_PORT_PINMUX(10, 5, 15)>; /* SD0_CD */
+               };
+
+               sd0-clk {
+                       pins = "SD0CLK";
+                       renesas,output-impedance = <3>;
+                       slew-rate = <0>;
+               };
+
+               sd0-dat-cmd {
+                       pins = "SD0DAT0", "SD0DAT1", "SD0DAT2", "SD0DAT3", "SD0CMD";
+                       input-enable;
+                       renesas,output-impedance = <3>;
+                       slew-rate = <0>;
+               };
+       };
+};
+
+&sdhi0 {
+       pinctrl-0 = <&sdhi0_pins>;
+       pinctrl-1 = <&sdhi0_pins>;
+       pinctrl-names = "default", "state_uhs";
+       vmmc-supply = <&reg_3p3v>;
+       vqmmc-supply = <&vqmmc_sdhi0>;
+       bus-width = <4>;
+       sd-uhs-sdr50;
+       sd-uhs-sdr104;
+       status = "okay";
+};