Bug #360519 none/tests/arm64/memory.vgtest might fail with newer gcc

The LDR (literal, int reg) testcase takes a code label and compares the
instructions around the label with known instructions in the code stream.
There were only fixed insns on either side of the checking instruction
which isn't enough given that offsets of +/-8 are used, instructions are
only 4 wide and the values loaded are 64bit. Newer gcc versions would
generate different code around the label and cause the tests to fail.

Add enough nops around the actual instruction to really give known
expected constant values to check against.

git-svn-id: svn://svn.valgrind.org/valgrind/trunk@15829

diff --git a/NEWS b/NEWS
index 21fe69d81384459c28515d843914b8a27b2fb073..0072d027d0e4767b32b402c818df93e0fdf3bc93 100644 (file)
--- a/NEWS
+++ b/NEWS
@@ -81,6 +81,7 @@ where XXXXXX is the bug number as listed below.
 359829  PowerPC test none/tests/ppc64/test_isa_2_07.c uninitialized memory
         references was fixed.
 359871  Incorrect mask handling in ppoll
+360519  none/tests/arm64/memory.vgtest might fail with newer gcc
 
 n-i-bz Fix incorrect (or infinite loop) unwind on RHEL7 x86 and amd64
 n-i-bz massif --pages-as-heap=yes does not report peak caused by mmap+munmap

diff --git a/none/tests/arm64/memory.c b/none/tests/arm64/memory.c
index 6034807b54496fa1625d5b3ee42ef61f26f62662..cbf31fd7eee94873ab885fded8be35547c68f51f 100644 (file)
--- a/none/tests/arm64/memory.c
+++ b/none/tests/arm64/memory.c
@@ -157,18 +157,18 @@ TESTINST2_hide2("ldp w21, w28, [x22, #-40] ; eor x21,x21,x28", AREA_MID, x21,x22
 
 ////////////////////////////////////////////////////////////////
 // This is a bit tricky.  We load the value from just before and
-// just after the actual instruction.  Because TESTINSN2_hide2 
-// generates two fixed insns either side of the test insn, these 
-// should be constant and hence "safe" to check.
+// just after the actual instruction.  So we place a couple of
+// nop insns either side of the test insn, these should "safe"
+// to check.
 
 printf("LDR (literal, int reg)\n");
-TESTINST2_hide2("xyzzy00: ldr  x21, xyzzy00 - 8", AREA_MID, x21,x22,0);
-TESTINST2_hide2("xyzzy01: ldr  x21, xyzzy01 + 0", AREA_MID, x21,x22,0);
-TESTINST2_hide2("xyzzy02: ldr  x21, xyzzy02 + 8", AREA_MID, x21,x22,0);
+TESTINST2_hide2("nop; nop; nop; xyzzy00: ldr  x21, xyzzy00 - 8; nop; nop; nop", AREA_MID, x21,x22,0);
+TESTINST2_hide2("nop; nop; nop; xyzzy01: ldr  x21, xyzzy01 + 0; nop; nop; nop", AREA_MID, x21,x22,0);
+TESTINST2_hide2("nop; nop; nop; xyzzy02: ldr  x21, xyzzy02 + 8; nop; nop; nop", AREA_MID, x21,x22,0);
 
-TESTINST2_hide2("xyzzy03: ldr  x21, xyzzy03 - 4", AREA_MID, x21,x22,0);
-TESTINST2_hide2("xyzzy04: ldr  x21, xyzzy04 + 0", AREA_MID, x21,x22,0);
-TESTINST2_hide2("xyzzy05: ldr  x21, xyzzy05 + 4", AREA_MID, x21,x22,0);
+TESTINST2_hide2("nop; nop; nop; xyzzy03: ldr  x21, xyzzy03 - 4; nop; nop; nop", AREA_MID, x21,x22,0);
+TESTINST2_hide2("nop; nop; nop; xyzzy04: ldr  x21, xyzzy04 + 0; nop; nop; nop", AREA_MID, x21,x22,0);
+TESTINST2_hide2("nop; nop; nop; xyzzy05: ldr  x21, xyzzy05 + 4; nop; nop; nop", AREA_MID, x21,x22,0);
 
 ////////////////////////////////////////////////////////////////
 printf("{LD,ST}R (integer register) (entirely MISSING)\n");

diff --git a/none/tests/arm64/memory.stdout.exp b/none/tests/arm64/memory.stdout.exp
index 397ce08ea6ba959e9623239bb2094e1b25865398..eb6ec3f79610467204f5163e6f45e0243d1c3e13 100644 (file)
--- a/none/tests/arm64/memory.stdout.exp
+++ b/none/tests/arm64/memory.stdout.exp
@@ -21,12 +21,12 @@ ldp w21, w28, [x22, #-40]! ; eor x21,x21,x28 :: rd 0000000004040404 rn (hidden),
 ldp w21, w28, [x22, #-40] ; add x21,x21,x28 :: rd 000000019b999794 rn (hidden), cin 0, nzcv 00000000     
 ldp w21, w28, [x22, #-40] ; eor x21,x21,x28 :: rd 0000000004040404 rn (hidden), cin 0, nzcv 00000000     
 LDR (literal, int reg)
-xyzzy00: ldr  x21, xyzzy00 - 8 :: rd aa0003f6d51b4203 rn (hidden), cin 0, nzcv 00000000     
-xyzzy01: ldr  x21, xyzzy01 + 0 :: rd aa1503e258000015 rn (hidden), cin 0, nzcv 00000000     
-xyzzy02: ldr  x21, xyzzy02 + 8 :: rd 911e43a0d53b4201 rn (hidden), cin 0, nzcv 00000000     
-xyzzy03: ldr  x21, xyzzy03 - 4 :: rd 58fffff5aa0003f6 rn (hidden), cin 0, nzcv 00000000     
-xyzzy04: ldr  x21, xyzzy04 + 0 :: rd aa1503e258000015 rn (hidden), cin 0, nzcv 00000000     
-xyzzy05: ldr  x21, xyzzy05 + 4 :: rd d53b4201aa1503e2 rn (hidden), cin 0, nzcv 00000000     
+nop; nop; nop; xyzzy00: ldr  x21, xyzzy00 - 8; nop; nop; nop :: rd d503201fd503201f rn (hidden), cin 0, nzcv 00000000     
+nop; nop; nop; xyzzy01: ldr  x21, xyzzy01 + 0; nop; nop; nop :: rd d503201f58000015 rn (hidden), cin 0, nzcv 00000000     
+nop; nop; nop; xyzzy02: ldr  x21, xyzzy02 + 8; nop; nop; nop :: rd d503201fd503201f rn (hidden), cin 0, nzcv 00000000     
+nop; nop; nop; xyzzy03: ldr  x21, xyzzy03 - 4; nop; nop; nop :: rd 58fffff5d503201f rn (hidden), cin 0, nzcv 00000000     
+nop; nop; nop; xyzzy04: ldr  x21, xyzzy04 + 0; nop; nop; nop :: rd d503201f58000015 rn (hidden), cin 0, nzcv 00000000     
+nop; nop; nop; xyzzy05: ldr  x21, xyzzy05 + 4; nop; nop; nop :: rd d503201fd503201f rn (hidden), cin 0, nzcv 00000000     
 {LD,ST}R (integer register) (entirely MISSING)
 LDRS{B,H,W} (uimm12)
 ldrsw x21, [x22, #24] :: rd ffffffff8b8a8988 rn (hidden), cin 0, nzcv 00000000