i386.c (scalar_to_vector_candidate_p): Support andnot instruction.

gcc/

	* config/i386/i386.c (scalar_to_vector_candidate_p): Support
	andnot instruction.
	(scalar_chain::convert_op): Likewise.
	* config/i386/i386.md (*andndi3_doubleword): New.

gcc/testsuite/

	* gcc.target/i386/pr65105-5.c: Adjust to andn generation.

From-SVN: r232500

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 1cc9288a91da657833b492715a35e47462ab7c58..b2522c17ce3e6c5a4ae684d62515a87e4aecbe52 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2016-01-18  Ilya Enkovich  <enkovich.gnu@gmail.com>
+
+       * config/i386/i386.c (scalar_to_vector_candidate_p): Support
+       andnot instruction.
+       (scalar_chain::convert_op): Likewise.
+       * config/i386/i386.md (*andndi3_doubleword): New.
+
 2016-01-18  Richard Biener  <rguenther@suse.de>
 
        PR tree-optimization/69170

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index ff976dd937e0882e50f51dfdd1a3594586fd496e..92d8ee1a88fbce9c8527e1541688513f0211190c 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -2815,7 +2815,11 @@ scalar_to_vector_candidate_p (rtx_insn *insn)
       return false;
     }
 
-  if (!REG_P (XEXP (src, 0)) && !MEM_P (XEXP (src, 0)))
+  if (!REG_P (XEXP (src, 0)) && !MEM_P (XEXP (src, 0))
+      /* Check for andnot case.  */
+      && (GET_CODE (src) != AND
+         || GET_CODE (XEXP (src, 0)) != NOT
+         || !REG_P (XEXP (XEXP (src, 0), 0))))
       return false;
 
   if (!REG_P (XEXP (src, 1)) && !MEM_P (XEXP (src, 1)))
@@ -3383,7 +3387,12 @@ scalar_chain::convert_op (rtx *op, rtx_insn *insn)
 {
   *op = copy_rtx_if_shared (*op);
 
-  if (MEM_P (*op))
+  if (GET_CODE (*op) == NOT)
+    {
+      convert_op (&XEXP (*op, 0), insn);
+      PUT_MODE (*op, V2DImode);
+    }
+  else if (MEM_P (*op))
     {
       rtx tmp = gen_reg_rtx (DImode);
 

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 71941d050919f1d7f1529386ae2ce16e0aafd888..f16b42ab884a9a6f137bcc242b4fae0da9bdda69 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -8645,6 +8645,23 @@
              (clobber (reg:CC FLAGS_REG))])]
   "split_double_mode (DImode, &operands[0], 3, &operands[0], &operands[3]);")
 
+(define_insn_and_split "*andndi3_doubleword"
+  [(set (match_operand:DI 0 "register_operand" "=r,r")
+       (and:DI
+         (not:DI (match_operand:DI 1 "register_operand" "r,r"))
+         (match_operand:DI 2 "nonimmediate_operand" "r,m")))
+   (clobber (reg:CC FLAGS_REG))]
+  "TARGET_BMI && !TARGET_64BIT && TARGET_STV && TARGET_SSE"
+  "#"
+  "&& reload_completed"
+  [(parallel [(set (match_dup 0)
+                  (and:SI (not:SI (match_dup 1)) (match_dup 2)))
+             (clobber (reg:CC FLAGS_REG))])
+   (parallel [(set (match_dup 3)
+                  (and:SI (not:SI (match_dup 4)) (match_dup 5)))
+             (clobber (reg:CC FLAGS_REG))])]
+  "split_double_mode (DImode, &operands[0], 3, &operands[0], &operands[3]);")
+
 (define_insn "*<code>hi_1"
   [(set (match_operand:HI 0 "nonimmediate_operand" "=r,rm,!k")
        (any_or:HI

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 7d93a493f5eeac419ef1ab097d9d038fd1ea85ac..498632d64eb2c143cbccf28dbf9c60a89be0cb58 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2016-01-18  Ilya Enkovich  <enkovich.gnu@gmail.com>
+
+       * gcc.target/i386/pr65105-5.c: Adjust to andn generation.
+
 2016-01-18  Eric Botcazou  <ebotcazou@adacore.com>
 
        * gnat.dg/inline12.adb: New test.

diff --git a/gcc/testsuite/gcc.target/i386/pr65105-5.c b/gcc/testsuite/gcc.target/i386/pr65105-5.c
index 5818c1c0bac832f4f01326df2879b7fd16807406..639bbe1eb141e592bf3ca1a4631967a409afd116 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr65105-5.c
+++ b/gcc/testsuite/gcc.target/i386/pr65105-5.c
@@ -1,7 +1,7 @@
 /* PR target/pr65105 */
 /* { dg-do compile { target { ia32 } } } */
 /* { dg-options "-O2 -march=core-avx2" } */
-/* { dg-final { scan-assembler "pand" } } */
+/* { dg-final { scan-assembler "pandn" } } */
 /* { dg-final { scan-assembler "pxor" } } */
 /* { dg-final { scan-assembler "ptest" } } */