]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: freescale: imx8mm-var-som: Add support for WM8904 audio codec
authorStefano Radaelli <stefano.r@variscite.com>
Thu, 19 Mar 2026 18:40:24 +0000 (19:40 +0100)
committerFrank Li <Frank.Li@nxp.com>
Fri, 27 Mar 2026 13:52:33 +0000 (09:52 -0400)
The VAR-SOM-MX8MM can integrate the WM8904, a high-performance
ultra-low-power stereo codec optimized for portable audio applications.

Add the WM8904 device to the appropriate I2C bus, enable the SAI
peripheral, and introduce the sound node to expose the sound card to the
system.

Add I3C recovery gpio properties.

Signed-off-by: Stefano Radaelli <stefano.r@variscite.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi

index 24924ee1e8c7bad96d3a5e4cd15d6b4e0840efc3..7cedef8add32f98834166324a66fb8966cdf98ad 100644 (file)
                reg = <0x0 0x40000000 0 0x80000000>;
        };
 
+       reg_audio_supply: regulator-3p3v {
+               compatible = "regulator-fixed";
+               regulator-name = "wm8904-supply";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-always-on;
+       };
+
        reg_eth_phy: regulator-eth-phy {
                compatible = "regulator-fixed";
                pinctrl-names = "default";
                regulator-min-microvolt = <1800000>;
                regulator-max-microvolt = <1800000>;
        };
+
+       sound {
+               compatible = "simple-audio-card";
+               simple-audio-card,bitclock-master = <&codec_dai>;
+               simple-audio-card,format = "i2s";
+               simple-audio-card,frame-master = <&codec_dai>;
+               simple-audio-card,mclk-fs = <256>;
+               simple-audio-card,name = "wm8904-audio";
+               simple-audio-card,routing =
+                       "Headphone Jack", "HPOUTL",
+                       "Headphone Jack", "HPOUTR",
+                       "IN2L", "Line In Jack",
+                       "IN2R", "Line In Jack",
+                       "IN1L", "Microphone Jack",
+                       "IN1R", "Microphone Jack";
+               simple-audio-card,widgets =
+                       "Microphone", "Microphone Jack",
+                       "Headphone", "Headphone Jack",
+                       "Line", "Line In Jack";
+
+               codec_dai: simple-audio-card,codec {
+                       sound-dai = <&wm8904>;
+               };
+
+               simple-audio-card,cpu {
+                       sound-dai = <&sai5>;
+               };
+       };
 };
 
 &A53_0 {
 
 &i2c3 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c3>;
+       pinctrl-1 = <&pinctrl_i2c3_gpio>;
+       scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
-       /* TODO: configure audio, as of now just put a placeholder */
        wm8904: codec@1a {
                compatible = "wlf,wm8904";
                reg = <0x1a>;
-               status = "disabled";
+               #sound-dai-cells = <0>;
+               clocks = <&clk IMX8MM_CLK_SAI5_ROOT>;
+               clock-names = "mclk";
+               AVDD-supply = <&ldo5_reg>;
+               CPVDD-supply = <&ldo5_reg>;
+               DBVDD-supply = <&reg_audio_supply>;
+               DCVDD-supply = <&ldo5_reg>;
+               MICVDD-supply = <&ldo5_reg>;
+               wlf,drc-cfg-names = "default", "peaklimiter", "tradition",
+                                   "soft", "music";
+               /*
+                * Config registers per name, respectively:
+                * KNEE_IP = 0,   KNEE_OP = 0,     HI_COMP = 1,   LO_COMP = 1
+                * KNEE_IP = -24, KNEE_OP = -6,    HI_COMP = 1/4, LO_COMP = 1
+                * KNEE_IP = -42, KNEE_OP = -3,    HI_COMP = 0,   LO_COMP = 1
+                * KNEE_IP = -45, KNEE_OP = -9,    HI_COMP = 1/8, LO_COMP = 1
+                * KNEE_IP = -30, KNEE_OP = -10.5, HI_COMP = 1/4, LO_COMP = 1
+                */
+               wlf,drc-cfg-regs = /bits/ 16 <0x01af 0x3248 0x0000 0x0000>,
+                                  /bits/ 16 <0x04af 0x324b 0x0010 0x0408>,
+                                  /bits/ 16 <0x04af 0x324b 0x0028 0x0704>,
+                                  /bits/ 16 <0x04af 0x324b 0x0018 0x078c>,
+                                  /bits/ 16 <0x04af 0x324b 0x0010 0x050e>;
+               /* GPIO1 = DMIC_CLK, don't touch others */
+               wlf,gpio-cfg = <0x0018>, <0xffff>, <0xffff>, <0xffff>;
        };
 };
 
+&sai5 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_sai5>;
+       assigned-clocks = <&clk IMX8MM_CLK_SAI5>;
+       assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
+       assigned-clock-rates = <1536000>;
+       #sound-dai-cells = <0>;
+       dmas = <&sdma2 8 25 0>, <&sdma2 9 25 0>;
+       dma-names = "rx", "tx";
+       fsl,sai-mclk-direction-output;
+       status = "okay";
+};
+
 &snvs_pwrkey {
        status = "okay";
 };
                >;
        };
 
+       pinctrl_i2c3_gpio: i2c3gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C3_SCL_GPIO5_IO18                0x1c3
+                       MX8MM_IOMUXC_I2C3_SDA_GPIO5_IO19                0x1c3
+               >;
+       };
+
        pinctrl_pmic: pmicirqgrp {
                fsl,pins = <
                        MX8MM_IOMUXC_SD1_DATA6_GPIO2_IO8                0x141
                >;
        };
 
+       pinctrl_sai5: sai5grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SAI5_RXD1_SAI5_TX_SYNC             0xd6
+                       MX8MM_IOMUXC_SAI5_RXFS_SAI5_RX_SYNC             0xd6
+                       MX8MM_IOMUXC_SAI5_RXD3_SAI5_TX_DATA0            0xd6
+                       MX8MM_IOMUXC_SAI5_RXD0_SAI5_RX_DATA0            0xd6
+                       MX8MM_IOMUXC_SAI5_RXC_SAI5_RX_BCLK              0xd6
+                       MX8MM_IOMUXC_SAI5_RXD2_SAI5_TX_BCLK             0xd6
+                       MX8MM_IOMUXC_SAI5_MCLK_SAI5_MCLK                0xd6
+               >;
+       };
+
        pinctrl_uart2: uart2grp {
                fsl,pins = <
                        MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX             0x140