--- /dev/null
+From 58ddbecb14c792b7fe0d92ae5e25c9179d62ff25 Mon Sep 17 00:00:00 2001
+From: Ao Zhong <hacc1225@gmail.com>
+Date: Tue, 25 Oct 2022 23:17:49 +0200
+Subject: drm/amd/display: move remaining FPU code to dml folder
+
+From: Ao Zhong <hacc1225@gmail.com>
+
+commit 58ddbecb14c792b7fe0d92ae5e25c9179d62ff25 upstream.
+
+pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_luma = 0;
+pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_chroma = 0;
+these two operations in dcn32/dcn32_resource.c still need to use FPU,
+This will cause compilation to fail on ARM64 platforms because
+-mgeneral-regs-only is enabled by default to disable the hardware FPU.
+Therefore, imitate the dcn31_zero_pipe_dcc_fraction function in
+dml/dcn31/dcn31_fpu.c, declare the dcn32_zero_pipe_dcc_fraction function
+in dcn32_fpu.c, and move above two operations into this function.
+
+Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
+Signed-off-by: Ao Zhong <hacc1225@gmail.com>
+Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c | 5 +++--
+ drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c | 8 ++++++++
+ drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.h | 3 +++
+ 3 files changed, 14 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c
++++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c
+@@ -1919,8 +1919,9 @@ int dcn32_populate_dml_pipes_from_contex
+ timing = &pipe->stream->timing;
+
+ pipes[pipe_cnt].pipe.src.gpuvm = true;
+- pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_luma = 0;
+- pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_chroma = 0;
++ DC_FP_START();
++ dcn32_zero_pipe_dcc_fraction(pipes, pipe_cnt);
++ DC_FP_END();
+ pipes[pipe_cnt].pipe.dest.vfront_porch = timing->v_front_porch;
+ pipes[pipe_cnt].pipe.src.gpuvm_min_page_size_kbytes = 256; // according to spreadsheet
+ pipes[pipe_cnt].pipe.src.unbounded_req_mode = false;
+--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
++++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
+@@ -2546,3 +2546,11 @@ void dcn32_update_bw_bounding_box_fpu(st
+ }
+ }
+
++void dcn32_zero_pipe_dcc_fraction(display_e2e_pipe_params_st *pipes,
++ int pipe_cnt)
++{
++ dc_assert_fp_enabled();
++
++ pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_luma = 0;
++ pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_chroma = 0;
++}
+--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.h
++++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.h
+@@ -73,4 +73,7 @@ int dcn32_find_dummy_latency_index_for_f
+
+ void dcn32_patch_dpm_table(struct clk_bw_params *bw_params);
+
++void dcn32_zero_pipe_dcc_fraction(display_e2e_pipe_params_st *pipes,
++ int pipe_cnt);
++
+ #endif
--- /dev/null
+From alexander.deucher@amd.com Sat Jan 14 14:58:11 2023
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Fri, 13 Jan 2023 14:03:02 -0500
+Subject: Revert "drm/amdgpu: Revert "drm/amdgpu: getting fan speed pwm for vega10 properly""
+To: <gregkh@linuxfoundation.org>, <stable@vger.kernel.org>
+Cc: Alex Deucher <alexander.deucher@amd.com>, Sasha Levin <sashal@kernel.org>, Yury Zhuravlev <stalkerg@gmail.com>, Guchun Chen <guchun.chen@amd.com>, "Asher Song" <Asher.Song@amd.com>
+Message-ID: <20230113190302.2210187-1-alexander.deucher@amd.com>
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+This reverts commit 9ccd11718d76b95c69aa773f2abedef560776037
+
+The original commit 16fb4dca95daa ("drm/amdgpu: getting fan speed pwm for vega10 properly")
+was reverted in commit 4545ae2ed3f2 ("drm/amdgpu: Revert "drm/amdgpu: getting fan speed pwm for vega10 properly"").
+but the test that resulted in the revert was wrong and was fixed so the
+revert was reverted in commit 30b8e7b8ee3b ("Revert "drm/amdgpu: Revert "drm/amdgpu: getting fan speed pwm for vega10 properly""").
+That should have been the end of it, but then Sasha picked up the
+original revert again and it was committed as 9ccd11718d76. So drop
+that commit so we get back to where we need to be.
+
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: Sasha Levin <sashal@kernel.org>
+Cc: stable@vger.kernel.org # 6.1.x
+Cc: Yury Zhuravlev <stalkerg@gmail.com>
+Cc: Guchun Chen <guchun.chen@amd.com>
+Cc: Asher Song <Asher.Song@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_thermal.c | 25 +++++++---------
+ 1 file changed, 12 insertions(+), 13 deletions(-)
+
+--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_thermal.c
++++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_thermal.c
+@@ -67,22 +67,21 @@ int vega10_fan_ctrl_get_fan_speed_info(s
+ int vega10_fan_ctrl_get_fan_speed_pwm(struct pp_hwmgr *hwmgr,
+ uint32_t *speed)
+ {
+- uint32_t current_rpm;
+- uint32_t percent = 0;
++ struct amdgpu_device *adev = hwmgr->adev;
++ uint32_t duty100, duty;
++ uint64_t tmp64;
+
+- if (hwmgr->thermal_controller.fanInfo.bNoFan)
+- return 0;
++ duty100 = REG_GET_FIELD(RREG32_SOC15(THM, 0, mmCG_FDO_CTRL1),
++ CG_FDO_CTRL1, FMAX_DUTY100);
++ duty = REG_GET_FIELD(RREG32_SOC15(THM, 0, mmCG_THERMAL_STATUS),
++ CG_THERMAL_STATUS, FDO_PWM_DUTY);
+
+- if (vega10_get_current_rpm(hwmgr, ¤t_rpm))
+- return -1;
++ if (!duty100)
++ return -EINVAL;
+
+- if (hwmgr->thermal_controller.
+- advanceFanControlParameters.usMaxFanRPM != 0)
+- percent = current_rpm * 255 /
+- hwmgr->thermal_controller.
+- advanceFanControlParameters.usMaxFanRPM;
+-
+- *speed = MIN(percent, 255);
++ tmp64 = (uint64_t)duty * 255;
++ do_div(tmp64, duty100);
++ *speed = MIN((uint32_t)tmp64, 255);
+
+ return 0;
+ }
drm-amdgpu-fixed-bug-on-error-when-unloading-amdgpu.patch
drm-amd-pm-correct-the-reference-clock-for-fan-speed-rpm-calculation.patch
drm-amd-pm-add-the-missing-mapping-for-ppt-feature-on-smu13.0.0-and-13.0.7.patch
+drm-amd-display-move-remaining-fpu-code-to-dml-folder.patch
+revert-drm-amdgpu-revert-drm-amdgpu-getting-fan-speed-pwm-for-vega10-properly.patch