drm/nouveau: tegra: Explicitly specify PMC instance to use

Currently the kernel relies on a global variable to reference the PMC
context. Use an explicit lookup for the PMC and pass that to the public
PMC APIs.

Acked-by: Danilo Krummrich <dakr@kernel.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/drivers/gpu/drm/nouveau/include/nvkm/core/tegra.h b/drivers/gpu/drm/nouveau/include/nvkm/core/tegra.h
index 57bc542780bbe5ffc5c30f18c139cb099b6d07ed..6aaa30ef167f6b1651ae95a77e3cf3670c4808f2 100644 (file)
--- a/drivers/gpu/drm/nouveau/include/nvkm/core/tegra.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/core/tegra.h
@@ -18,6 +18,8 @@ struct nvkm_device_tegra {
 
        struct regulator *vdd;
 
+       struct tegra_pmc *pmc;
+
        struct {
                /*
                 * Protects accesses to mm from subsystems

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c
index 46bb55a1f565db2d78441bde968914e77d695652..3c8d0878891adf3a09de5865e2c4629cb8b4cfaf 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c
@@ -54,7 +54,8 @@ nvkm_device_tegra_power_up(struct nvkm_device_tegra *tdev)
                reset_control_assert(tdev->rst);
                udelay(10);
 
-               ret = tegra_powergate_remove_clamping(TEGRA_POWERGATE_3D);
+               ret = tegra_pmc_powergate_remove_clamping(tdev->pmc,
+                                                         TEGRA_POWERGATE_3D);
                if (ret)
                        goto err_clamp;
                udelay(10);
@@ -307,6 +308,12 @@ nvkm_device_tegra_new(const struct nvkm_device_tegra_func *func,
                goto free;
        }
 
+       tdev->pmc = devm_tegra_pmc_get(&pdev->dev);
+       if (IS_ERR(tdev->pmc)) {
+               ret = PTR_ERR(tdev->pmc);
+               goto free;
+       }
+
        /**
         * The IOMMU bit defines the upper limit of the GPU-addressable space.
         */