mtd: spinand: Create an array of operation templates

Currently, the SPI NAND core implementation directly calls macros to get
the various operations in shape. These macros are specific to the bus
interface, currently only supporting the single SDR interface (any
command following the 1S-XX-XX pattern).

Introducing support for other bus interfaces (such as octal DTR) would
mean that every user of these macros should become aware of the current
bus interface and act accordingly, picking up and adapting to the
current configuration. This would add quite a bit of boilerplate, be
repetitive as well as error prone in case we miss one occurrence.

Instead, let's create a table with all SPI NAND memory operations that
are currently supported. We initialize them with the same single SDR _OP
macros as before. This opens the possibility for users of the individual
macros to make use of these templates instead. This way, when we will add
another bus interface, we can just switch to another set of templates
and all users will magically fill in their spi_mem_op structures with
the correct ops.

The existing read, write and update cache variants are also moved in
this template array, which is barely noticeable by callers as we also
add a structure member pointing to it.

Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>

diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index 30a8f2894d0244c6cd709732a24293fef727695a..4ab63d7fc461da9f84099410f28dcece898881a5 100644 (file)
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -184,9 +184,9 @@ static int spinand_init_quad_enable(struct spinand_device *spinand)
        if (!(spinand->flags & SPINAND_HAS_QE_BIT))
                return 0;
 
-       if (spinand->op_templates.read_cache->data.buswidth == 4 ||
-           spinand->op_templates.write_cache->data.buswidth == 4 ||
-           spinand->op_templates.update_cache->data.buswidth == 4)
+       if (spinand->op_templates->read_cache->data.buswidth == 4 ||
+           spinand->op_templates->write_cache->data.buswidth == 4 ||
+           spinand->op_templates->update_cache->data.buswidth == 4)
                enable = true;
 
        return spinand_upd_cfg(spinand, CFG_QUAD_ENABLE,
@@ -1154,7 +1154,7 @@ static int spinand_create_dirmap(struct spinand_device *spinand,
        info.offset = plane << fls(nand->memorg.pagesize);
 
        info.length = nanddev_page_size(nand) + nanddev_per_page_oobsize(nand);
-       info.op_tmpl = *spinand->op_templates.update_cache;
+       info.op_tmpl = *spinand->op_templates->update_cache;
        desc = devm_spi_mem_dirmap_create(&spinand->spimem->spi->dev,
                                          spinand->spimem, &info);
        if (IS_ERR(desc))
@@ -1162,7 +1162,7 @@ static int spinand_create_dirmap(struct spinand_device *spinand,
 
        spinand->dirmaps[plane].wdesc = desc;
 
-       info.op_tmpl = *spinand->op_templates.read_cache;
+       info.op_tmpl = *spinand->op_templates->read_cache;
        desc = spinand_create_rdesc(spinand, &info);
        if (IS_ERR(desc))
                return PTR_ERR(desc);
@@ -1177,7 +1177,7 @@ static int spinand_create_dirmap(struct spinand_device *spinand,
        }
 
        info.length = nanddev_page_size(nand) + nanddev_per_page_oobsize(nand);
-       info.op_tmpl = *spinand->op_templates.update_cache;
+       info.op_tmpl = *spinand->op_templates->update_cache;
        info.op_tmpl.data.ecc = true;
        desc = devm_spi_mem_dirmap_create(&spinand->spimem->spi->dev,
                                          spinand->spimem, &info);
@@ -1186,7 +1186,7 @@ static int spinand_create_dirmap(struct spinand_device *spinand,
 
        spinand->dirmaps[plane].wdesc_ecc = desc;
 
-       info.op_tmpl = *spinand->op_templates.read_cache;
+       info.op_tmpl = *spinand->op_templates->read_cache;
        info.op_tmpl.data.ecc = true;
        desc = spinand_create_rdesc(spinand, &info);
        if (IS_ERR(desc))
@@ -1324,6 +1324,22 @@ static void spinand_manufacturer_cleanup(struct spinand_device *spinand)
                return spinand->manufacturer->ops->cleanup(spinand);
 }
 
+static void spinand_init_ssdr_templates(struct spinand_device *spinand)
+{
+       struct spinand_mem_ops *tmpl = &spinand->ssdr_op_templates;
+
+       tmpl->reset = (struct spi_mem_op)SPINAND_RESET_1S_0_0_OP;
+       tmpl->readid = (struct spi_mem_op)SPINAND_READID_1S_1S_1S_OP(0, 0, NULL, 0);
+       tmpl->wr_en = (struct spi_mem_op)SPINAND_WR_EN_1S_0_0_OP;
+       tmpl->wr_dis = (struct spi_mem_op)SPINAND_WR_DIS_1S_0_0_OP;
+       tmpl->set_feature = (struct spi_mem_op)SPINAND_SET_FEATURE_1S_1S_1S_OP(0, NULL);
+       tmpl->get_feature = (struct spi_mem_op)SPINAND_GET_FEATURE_1S_1S_1S_OP(0, NULL);
+       tmpl->blk_erase = (struct spi_mem_op)SPINAND_BLK_ERASE_1S_1S_0_OP(0);
+       tmpl->page_read = (struct spi_mem_op)SPINAND_PAGE_READ_1S_1S_0_OP(0);
+       tmpl->prog_exec = (struct spi_mem_op)SPINAND_PROG_EXEC_1S_1S_0_OP(0);
+       spinand->op_templates = &spinand->ssdr_op_templates;
+}
+
 static const struct spi_mem_op *
 spinand_select_op_variant(struct spinand_device *spinand,
                          const struct spinand_op_variants *variants)
@@ -1419,21 +1435,21 @@ int spinand_match_and_init(struct spinand_device *spinand,
                if (!op)
                        return -EOPNOTSUPP;
 
-               spinand->op_templates.read_cache = op;
+               spinand->ssdr_op_templates.read_cache = op;
 
                op = spinand_select_op_variant(spinand,
                                               info->op_variants.write_cache);
                if (!op)
                        return -EOPNOTSUPP;
 
-               spinand->op_templates.write_cache = op;
+               spinand->ssdr_op_templates.write_cache = op;
 
                op = spinand_select_op_variant(spinand,
                                               info->op_variants.update_cache);
                if (!op)
                        return -EOPNOTSUPP;
 
-               spinand->op_templates.update_cache = op;
+               spinand->ssdr_op_templates.update_cache = op;
 
                return 0;
        }
@@ -1548,6 +1564,8 @@ static int spinand_init(struct spinand_device *spinand)
        if (!spinand->scratchbuf)
                return -ENOMEM;
 
+       spinand_init_ssdr_templates(spinand);
+
        ret = spinand_detect(spinand);
        if (ret)
                goto err_free_bufs;

diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c
index 4870b2d5edb2a1f8081b87bbe9de549c73272d7c..d5799c2df06520de6cb5c5b771ceeb9d11ddf1fb 100644 (file)
--- a/drivers/mtd/nand/spi/winbond.c
+++ b/drivers/mtd/nand/spi/winbond.c
@@ -291,7 +291,7 @@ static int w25n0xjw_hs_cfg(struct spinand_device *spinand)
        u8 sr4;
        int ret;
 
-       op = spinand->op_templates.read_cache;
+       op = spinand->op_templates->read_cache;
        if (op->cmd.dtr || op->addr.dtr || op->dummy.dtr || op->data.dtr)
                hs = false;
        else if (op->cmd.buswidth == 1 && op->addr.buswidth == 1 &&
@@ -355,7 +355,7 @@ static int w35n0xjw_vcr_cfg(struct spinand_device *spinand)
        u8 io_mode;
        int ret;
 
-       op = spinand->op_templates.read_cache;
+       op = spinand->op_templates->read_cache;
 
        single = (op->cmd.buswidth == 1 && op->addr.buswidth == 1 && op->data.buswidth == 1);
        dtr = (op->cmd.dtr || op->addr.dtr || op->data.dtr);

diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
index 4715083aa8e581f7497c102a930bf70985fbaeae..a458617fb3755f28483f4d331fa5fa38a70d20c0 100644 (file)
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -600,6 +600,36 @@ struct spinand_dirmap {
        struct spi_mem_dirmap_desc *rdesc_ecc;
 };
 
+/**
+ * struct spinand_mem_ops - SPI NAND memory operations
+ * @reset: reset op template
+ * @readid: read ID op template
+ * @wr_en: write enable op template
+ * @wr_dis: write disable op template
+ * @set_feature: set feature op template
+ * @get_feature: get feature op template
+ * @blk_erase: blk erase op template
+ * @page_read: page read op template
+ * @prog_exec: prog exec op template
+ * @read_cache: read cache op template
+ * @write_cache: write cache op template
+ * @update_cache: update cache op template
+ */
+struct spinand_mem_ops {
+       struct spi_mem_op reset;
+       struct spi_mem_op readid;
+       struct spi_mem_op wr_en;
+       struct spi_mem_op wr_dis;
+       struct spi_mem_op set_feature;
+       struct spi_mem_op get_feature;
+       struct spi_mem_op blk_erase;
+       struct spi_mem_op page_read;
+       struct spi_mem_op prog_exec;
+       const struct spi_mem_op *read_cache;
+       const struct spi_mem_op *write_cache;
+       const struct spi_mem_op *update_cache;
+};
+
 /**
  * struct spinand_device - SPI NAND device instance
  * @base: NAND device instance
@@ -607,10 +637,8 @@ struct spinand_dirmap {
  * @lock: lock used to serialize accesses to the NAND
  * @id: NAND ID as returned by READ_ID
  * @flags: NAND flags
- * @op_templates: various SPI mem op templates
- * @op_templates.read_cache: read cache op template
- * @op_templates.write_cache: write cache op template
- * @op_templates.update_cache: update cache op template
+ * @ssdr_op_templates: Templates for all single SDR SPI mem operations
+ * @op_templates: Templates for all SPI mem operations
  * @select_target: select a specific target/die. Usually called before sending
  *                a command addressing a page or an eraseblock embedded in
  *                this die. Only required if your chip exposes several dies
@@ -644,11 +672,8 @@ struct spinand_device {
        struct spinand_id id;
        u32 flags;
 
-       struct {
-               const struct spi_mem_op *read_cache;
-               const struct spi_mem_op *write_cache;
-               const struct spi_mem_op *update_cache;
-       } op_templates;
+       struct spinand_mem_ops ssdr_op_templates;
+       struct spinand_mem_ops *op_templates;
 
        struct spinand_dirmap *dirmaps;