*/
ATH10K_HW_CC_WRAP_SHIFTED_ALL = 1,
- /* Each hw counter wrapsaround independently. When the
- * counter overflows the repestive counter is right shifted
+ /* Each hw counter wraps around independently. When the
+ * counter overflows the respective counter is right shifted
* by 1, i.e reset to 0x7fffffff, and other counters will be
* running unaffected. In this type of wraparound, it should
* be possible to report accurate Rx busy time unlike the
#define TARGET_10_4_NUM_TDLS_BUFFER_STA 1
#define TARGET_10_4_NUM_TDLS_SLEEP_STA 1
-/* Maximum number of Copy Engine's supported */
+/* Maximum number of Copy Engines supported */
#define CE_COUNT_MAX 12
/* Number of Copy Engines supported */
#define RTC_STATE_V_GET(x) (((x) & RTC_STATE_V_MASK) >> RTC_STATE_V_LSB)
/* Register definitions for first generation ath10k cards. These cards include
- * a mac thich has a register allocation similar to ath9k and at least some
+ * a mac which has a register allocation similar to ath9k and at least some
* registers including the ones relevant for modifying the coverage class are
* identical to the ath9k definitions.
* These registers are usually managed by the ath10k firmware. However by
* Queue control unit (QCU) registers [5211+]
*
* Card has 12 TX Queues but i see that only 0-9 are used (?)
- * both in binary HAL (see ah.h) and ar5k. Each queue has it's own
+ * both in binary HAL (see ah.h) and ar5k. Each queue has its own
* TXDP at addresses 0x0800 - 0x082c, a CBR (Constant Bit Rate)
* configuration register (0x08c0 - 0x08ec), a ready time configuration
* register (0x0900 - 0x092c), a misc configuration register (0x09c0 -
brcmf_dbg(SCAN, "Enter\n");
if (e->datalen < (sizeof(*pfn_result) + sizeof(*netinfo))) {
- brcmf_dbg(SCAN, "Event data to small. Ignore\n");
+ brcmf_dbg(SCAN, "Event data too small. Ignore\n");
return 0;
}
brcmf_dbg(SCAN, "Enter\n");
if (e->datalen < (sizeof(*pfn_result) + sizeof(*netinfo))) {
- brcmf_dbg(SCAN, "Event data to small. Ignore\n");
+ brcmf_dbg(SCAN, "Event data too small. Ignore\n");
return 0;
}
brcmf_set_mpc(ifp, 1);
} else {
- /* Configure WOWL paramaters */
+ /* Configure WOWL parameters */
brcmf_configure_wowl(cfg, ifp, wowl);
/* Prevent disassociation due to inactivity with keep-alive */
if (!settings)
return NULL;
- /* start by using the module paramaters */
+ /* start by using the module parameters */
settings->p2p_enable = !!brcmf_p2p_enable;
settings->feature_disable = brcmf_feature_disable;
settings->fcmode = brcmf_fcmode;
if (err == -ENODEV)
brcmf_dbg(INFO, "No platform data available.\n");
- /* Initialize global module paramaters */
+ /* Initialize global module parameters */
brcmf_mp_attach();
/* Continue the initialization by registering the different busses */
*/
/**
- * struct brcmf_mp_global_t - Global module paramaters.
+ * struct brcmf_mp_global_t - Global module parameters.
*
* @firmware_path: Alternative firmware path.
*/
extern struct brcmf_mp_global_t brcmf_mp_global;
/**
- * struct brcmf_mp_device - Device module paramaters.
+ * struct brcmf_mp_device - Device module parameters.
*
* @p2p_enable: Legacy P2P0 enable (old wpa_supplicant).
* @feature_disable: Feature_disable bitmask.
/* Forward decls for struct brcmf_pub (see below) */
struct brcmf_proto; /* device communication protocol info */
struct brcmf_fws_info; /* firmware signalling info */
-struct brcmf_mp_device; /* module paramateres, device specific */
+struct brcmf_mp_device; /* module parameters, device specific */
/*
* struct brcmf_rev_info
u8 action;
if (e->datalen < sizeof(*rxframe)) {
- brcmf_dbg(SCAN, "Event data to small. Ignore\n");
+ brcmf_dbg(SCAN, "Event data too small. Ignore\n");
return 0;
}
e->reason);
if (e->datalen < sizeof(*rxframe)) {
- brcmf_dbg(SCAN, "Event data to small. Ignore\n");
+ brcmf_dbg(SCAN, "Event data too small. Ignore\n");
return 0;
}
u8 channel;
u8 type; /* see enum il_measurement_type */
u8 reserved1;
- /* NOTE: cca_ofdm, cca_cck, basic_type, and histogram are only only
+ /* NOTE: cca_ofdm, cca_cck, basic_type, and histogram are only
* valid if applicable for measurement type requested. */
__le32 cca_ofdm; /* cca fraction time in 40Mhz clock periods */
__le32 cca_cck; /* cca fraction time in 44Mhz clock periods */
* listen mode. Will be fragmented. Valid only on the P2P Device MAC.
* Valid only on the P2P Device MAC. The firmware will take into account
* the duration, the interval and the repetition count.
- * @SESSION_PROTECT_CONF_P2P_GO_NEGOTIATION: Schedule the P2P Device to be be
+ * @SESSION_PROTECT_CONF_P2P_GO_NEGOTIATION: Schedule the P2P Device to be
* able to run the GO Negotiation. Will not be fragmented and not
* repetitive. Valid only on the P2P Device MAC. Only the duration will
* be taken into account.
/*
* For non-QoS this relies on the fact that both the uCode and
- * mac80211 use TID 0 (as they need to to avoid replay attacks)
+ * mac80211 use TID 0 (as they need to avoid replay attacks)
* for checking the IV in the frames.
*/
for (i = 0; i < IWL_NUM_RSC; i++) {
/*
* For non-QoS this relies on the fact that both the uCode and
- * mac80211 use TID 0 (as they need to to avoid replay attacks)
+ * mac80211 use TID 0 (as they need to avoid replay attacks)
* for checking the IV in the frames.
*/
for (i = 0; i < IWL_MAX_TID_COUNT; i++) {
* us to stop a hw_scan when it's already stopped. This can
* happen, for instance, if we stopped the scan ourselves,
* called ieee80211_scan_completed() and the userspace called
- * cancel scan scan before ieee80211_scan_work() could run.
+ * cancel scan before ieee80211_scan_work() could run.
* To handle that, simply return if the scan is not running.
*/
if (mvm->scan_status & IWL_MVM_SCAN_REGULAR)
* us to stop a sched_scan when it's already stopped. This
* can happen, for instance, if we stopped the scan ourselves,
* called ieee80211_sched_scan_stopped() and the userspace called
- * stop sched scan scan before ieee80211_sched_scan_stopped_work()
+ * stop sched scan before ieee80211_sched_scan_stopped_work()
* could run. To handle this, simply return if the scan is
* not running.
*/
mvmvif->deflink.bcast_sta.tfd_queue_msk &= ~BIT(queue);
}
-/* Send the FW a request to remove the station from it's internal data
+/* Send the FW a request to remove the station from its internal data
* structures, but DO NOT remove the entry from the local data structures. */
int iwl_mvm_send_rm_bcast_sta(struct iwl_mvm *mvm, struct ieee80211_vif *vif)
{
}
/*
- * Send the FW a request to remove the station from it's internal data
+ * Send the FW a request to remove the station from its internal data
* structures, and in addition remove it from the local data structure.
*/
int iwl_mvm_rm_p2p_bcast_sta(struct iwl_mvm *mvm, struct ieee80211_vif *vif)
}
/*
- * Send the FW a request to remove the station from it's internal data
+ * Send the FW a request to remove the station from its internal data
* structures, and in addition remove it from the local data structure.
*/
int iwl_mvm_rm_mcast_sta(struct iwl_mvm *mvm, struct ieee80211_vif *vif)
/* gpios should be handled in board files and provided via platform data,
* but because it's currently impossible for p54spi to have a header file
- * in include/linux, let's use module paramaters for now
+ * in include/linux, let's use module parameters for now
*/
static int p54spi_gpio_power = 97;
struct p54s_priv *priv = dev->priv;
int ret;
- /* FIXME: should driver use it's own struct device? */
+ /* FIXME: should driver use its own struct device? */
ret = request_firmware(&priv->firmware, "3826.arm", &priv->spi->dev);
if (ret < 0) {
}
/*
- * This function get's called after lbs_setup_firmware() determined the
- * firmware capabities. So we can setup the wiphy according to our
+ * This function gets called after lbs_setup_firmware() determined the
+ * firmware capabilities. So we can setup the wiphy according to our
* hardware/firmware.
*/
int lbs_cfg_register(struct lbs_private *priv)
__le32 fw_cap_info;
__le32 dot_11n_dev_cap;
u8 dev_mcs_support;
- __le16 mp_end_port; /* SDIO only, reserved for other interfacces */
+ __le16 mp_end_port; /* SDIO only, reserved for other interfaces */
__le16 mgmt_buf_count; /* mgmt IE buffer count */
__le32 reserved_5;
__le32 reserved_6;
struct host_cmd_ds_txbuf_cfg {
__le16 action;
__le16 buff_size;
- __le16 mp_end_port; /* SDIO only, reserved for other interfacces */
+ __le16 mp_end_port; /* SDIO only, reserved for other interfaces */
__le16 reserved3;
} __packed;
/*
* Use the crc ccitt algorithm.
* This will return the same value as the legacy driver which
- * used bit ordering reversion on the both the firmware bytes
+ * used bit ordering reversion on both the firmware bytes
* before input input as well as on the final output.
* Obviously using crc ccitt directly is much more efficient.
*/
}
/*
- * Every single frame has it's own tx status, hence report
+ * Every single frame has its own tx status, hence report
* every frame as ampdu of size 1.
*
* TODO: if we can find out how many frames were aggregated
/*
* If the IV/EIV data was stripped from the frame before it was
* passed to the hardware, we should now reinsert it again because
- * mac80211 will expect the same data to be present it the
+ * mac80211 will expect the same data to be present in the
* frame as it was passed to us.
*/
if (rt2x00_has_cap_hw_crypto(rt2x00dev))
/*
* For IV/EIV/ICV assembly we must make sure there is
- * at least 8 bytes bytes available in headroom for IV/EIV
+ * at least 8 bytes available in headroom for IV/EIV
* and 8 bytes for ICV data as tailroon.
*/
if (rt2x00_has_cap_hw_crypto(rt2x00dev)) {
/*
- * The rtl8723a has 3 channel groups for it's efuse settings. It only
+ * The rtl8723a has 3 channel groups for its efuse settings. It only
* supports the 2.4GHz band, so channels 1 - 14:
* group 0: channels 1 - 3
* group 1: channels 4 - 9
rtlphy->num_total_rfpath = 2;
/* Single phy mode: use radio_a radio_b config path_A path_B */
- /* seperately by MAC0, and MAC1 needn't configure RF; */
+ /* separately by MAC0, and MAC1 needn't configure RF; */
/* Dual PHY mode:MAC0 use radio_a config 1st phy path_A, */
/* MAC1 use radio_b config 2nd PHY path_A. */
/* DMDP,MAC0 on G band,MAC1 on A band. */
rtl92s_phy_set_bb_reg(hw, pphyreg->rfhssi_para2,
B3WIRE_DATALENGTH, 0x0);
- /* Initialize RF fom connfiguration file */
+ /* Initialize RF from configuration file */
switch (rfpath) {
case RF90_PATH_A:
rtstatus = rtl92s_phy_config_rf(hw,
/*Set retry limit*/
rtl_write_word(rtlpriv, REG_RL, 0x0707);
- /* Set Data / Response auto rate fallack retry count*/
+ /* Set Data / Response auto rate fallback retry count*/
rtl_write_dword(rtlpriv, REG_DARFRC, 0x01000000);
rtl_write_dword(rtlpriv, REG_DARFRC + 4, 0x07060504);
rtl_write_dword(rtlpriv, REG_RARFRC, 0x01000000);
rtl_write_byte(rtlpriv, REG_CR, 0xFF);
/* We should init LLT & RQPN and
- * prepare Tx/Rx descrptor address later
+ * prepare Tx/Rx descriptor address later
* because MAC function is reset.*/
}
/* 7. Restore PCIe autoload down bit */
- /* 8812AE does not has the defination. */
+ /* 8812AE does not have the definition. */
if (rtlhal->hw_type == HARDWARE_TYPE_RTL8821AE) {
/* write 0xF8 bit[17] = 1'b1 */
tmp = rtl_read_byte(rtlpriv, REG_MAC_PHY_CTRL_NORMAL + 2);
rtl_write_byte(rtlpriv, REG_MAC_PHY_CTRL_NORMAL + 2, tmp);
}
- /* In MAC power on state, BB and RF maybe in ON state,
+ /* In MAC power on state, BB and RF may be in ON state,
* if we release TRx DMA here.
* it will cause packets to be started to Tx/Rx,
* so we release Tx/Rx DMA later.*/
_rtl8821ae_get_wakeup_reason(hw);
/* Patch Pcie Rx DMA hang after S3/S4 several times.
- * The root cause has not be found. */
+ * The root cause has not been found. */
if (_rtl8821ae_check_pcie_dma_hang(hw))
_rtl8821ae_reset_pcie_interface_dma(hw, true, false);
rtl8821ae_phy_mac_config(hw);
/* because last function modify RCR, so we update
* rcr var here, or TP will unstable for receive_config
- * is wrong, RX RCR_ACRC32 will cause TP unstabel & Rx
+ * is wrong, RX RCR_ACRC32 will cause TP unstable & Rx
* RCR_APP_ICV will cause mac80211 unassoc for cisco 1252
rtlpci->receive_config = rtl_read_dword(rtlpriv, REG_RCR);
rtlpci->receive_config &= ~(RCR_ACRC32 | RCR_AICV);
if (_rtl8821ae_dynamic_rqpn(hw, 0xE0, 0x3, 0x80c20d0d))
rtlhal->re_init_llt_table = true;
- /* 3 <2> Set Fw releted H2C cmd. */
+ /* 3 <2> Set Fw related H2C cmd. */
/* Set WoWLAN related security information. */
rtl8821ae_set_fw_global_info_cmd(hw);
/* 3 <3> Hw Configutations */
- /* Wait untill Rx DMA Finished before host sleep.
- * FW Pause Rx DMA may happens when received packet doing dma.
+ /* Wait until Rx DMA Finished before host sleep.
+ * FW Pause Rx DMA may happen when received packet doing DMA.
*/
rtl_write_byte(rtlpriv, REG_RXDMA_CONTROL, BIT(2));
{
}
-/* Turn on AAP (RCR:bit 0) for promicuous mode. */
+/* Turn on AAP (RCR:bit 0) for promiscuous mode. */
void rtl8821ae_allow_all_destaddr(struct ieee80211_hw *hw,
bool allow_all_da, bool write_into_reg)
{
/* RX page size = 128 byte */
offset = MAX_RX_DMA_BUFFER_SIZE_8812 / 128;
- /* We should start from the boundry */
+ /* We should start from the boundary */
cam_start = offset * 128;
/* Enable Rx packet buffer access. */
the burst read starts at EEPROM address 0.
Otherwise, it starts at the address
following the address of the previous access.
- TheWlan hardware hardware clears this bit automatically.
+ TheWlan hardware clears this bit automatically.
Default: 0x00000000
*================================================*/
loads a single byte of data into the EE_DATA
register from the EEPROM location specified in
the EE_ADDR register.
- The Wlan hardware hardware clears this bit automatically.
+ The Wlan hardware clears this bit automatically.
EE_DATA is valid when this bit is cleared.
0 EE_WRITE - EEPROM Write Request - Setting this bit
writes a single byte of data from the EE_DATA register into the
EEPROM location specified in the EE_ADDR register.
- The Wlan hardware hardware clears this bit automatically.
+ The Wlan hardware clears this bit automatically.
*===============================================*/
#define EE_CTL (REGISTERS_BASE + 0x2000)
#define ACX_EE_CTL_REG EE_CTL
the burst read starts at EEPROM address 0.
Otherwise, it starts at the address
following the address of the previous access.
- TheWlan hardware hardware clears this bit automatically.
+ TheWlan hardware clears this bit automatically.
Default: 0x00000000
*================================================*/
loads a single byte of data into the EE_DATA
register from the EEPROM location specified in
the EE_ADDR register.
- The Wlan hardware hardware clears this bit automatically.
+ The Wlan hardware clears this bit automatically.
EE_DATA is valid when this bit is cleared.
0 EE_WRITE - EEPROM Write Request - Setting this bit
writes a single byte of data from the EE_DATA register into the
EEPROM location specified in the EE_ADDR register.
- The Wlan hardware hardware clears this bit automatically.
+ The Wlan hardware clears this bit automatically.
*===============================================*/
#define ACX_EE_CTL_REG EE_CTL
#define EE_WRITE 0x00000001ul
}
if (urb->actual_length < sizeof(hdr)) {
- dev_dbg_f(urb_dev(urb), "error: urb %p to small\n", urb);
+ dev_dbg_f(urb_dev(urb), "error: urb %p too small\n", urb);
goto resubmit;
}
projects / thirdparty / linux.git / commitdiff
