]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
media: iris: Add hardware power on/off ops for X1P42100
authorWangao Wang <wangao.wang@oss.qualcomm.com>
Fri, 29 May 2026 07:34:59 +0000 (15:34 +0800)
committerBryan O'Donoghue <bod@kernel.org>
Sat, 30 May 2026 07:41:49 +0000 (08:41 +0100)
On X1P42100 the Iris block has an extra BSE clock. Wire this clock into
the power on/off sequence.

The BSE clock is used to drive the Bin Stream Engine, which is a sub-block
of the video codec hardware responsible for bitstream-level processing. It
is required to be enabled separately from the core clock to ensure proper
codec operation.

Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>
Signed-off-by: Wangao Wang <wangao.wang@oss.qualcomm.com>
Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
drivers/media/platform/qcom/iris/iris_vpu_common.c

index 3872c4f37987ebbddbb040722adaa252faa40a73..5a85568c5ee1c5b656131607e7aef1b8a75e020d 100644 (file)
@@ -224,6 +224,7 @@ void iris_vpu_power_off_hw(struct iris_core *core)
 {
        dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN], false);
        iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN]);
+       iris_disable_unprepare_clock(core, IRIS_BSE_HW_CLK);
        iris_disable_unprepare_clock(core, IRIS_HW_AHB_CLK);
        iris_disable_unprepare_clock(core, IRIS_HW_CLK);
 }
@@ -292,12 +293,18 @@ int iris_vpu_power_on_hw(struct iris_core *core)
        if (ret && ret != -ENOENT)
                goto err_disable_hw_clock;
 
+       ret = iris_prepare_enable_clock(core, IRIS_BSE_HW_CLK);
+       if (ret && ret != -ENOENT)
+               goto err_disable_hw_ahb_clock;
+
        ret = dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN], true);
        if (ret)
-               goto err_disable_hw_ahb_clock;
+               goto err_disable_bse_hw_clock;
 
        return 0;
 
+err_disable_bse_hw_clock:
+       iris_disable_unprepare_clock(core, IRIS_BSE_HW_CLK);
 err_disable_hw_ahb_clock:
        iris_disable_unprepare_clock(core, IRIS_HW_AHB_CLK);
 err_disable_hw_clock: