2014-01-25 Walter Lee <walt@tilera.com>
Backport from mainline
2014-01-25 Walter Lee <walt@tilera.com>
* config/tilegx/tilegx-c.c (tilegx_cpu_cpp_builtins):
Define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_{1,2}.
* config/tilegx/tilepro-c.c (tilepro_cpu_cpp_builtins):
Define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_{1,2,4,8}.
From-SVN: r207103
+2014-01-25 Walter Lee <walt@tilera.com>
+
+ Backport from mainline
+ 2014-01-25 Walter Lee <walt@tilera.com>
+
+ * config/tilegx/tilegx-c.c (tilegx_cpu_cpp_builtins):
+ Define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_{1,2}.
+ * config/tilegx/tilepro-c.c (tilepro_cpu_cpp_builtins):
+ Define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_{1,2,4,8}.
+
2014-01-25 Walter Lee <walt@tilera.com>
Backport from mainline
if (TARGET_32BIT)
builtin_define ("__tilegx32__");
+ builtin_define ("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
+ builtin_define ("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
+
TILEGX_CPU_CPP_ENDIAN_BUILTINS ();
GNU_USER_TARGET_OS_CPP_BUILTINS ();
}
builtin_define ("__tile_chip__=1");
builtin_define ("__tile_chip_rev__=0");
+ builtin_define ("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
+ builtin_define ("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
+ builtin_define ("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");
+ builtin_define ("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");
+
TILEPRO_CPU_CPP_ENDIAN_BUILTINS ();
GNU_USER_TARGET_OS_CPP_BUILTINS ();
}