hw/intc: declare NVIC regions as little endian

The NVIC should always be a little-endian device as big-endian
behaviour is a function of the current CPU configuration not the
system as a whole. Indeed the Armv8-M architecture reference manual
declares:

  All accesses to the Private Peripheral Bus (PPB) are always
  little-endian, which means that the PE assumes a little-endian
  arrangement of the PPB registers.

This should have no functional effect as the NVIC cannot be
instantiated on a BE system but will help the single binary efforts.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20260121105932.135676-2-alex.bennee@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c
index 3a31eb56f362e9ecd9013bbe5d1deb64a74565f2..28b34e99446f85fb2e4536857c2b3e59c3915fbf 100644 (file)
--- a/hw/intc/armv7m_nvic.c
+++ b/hw/intc/armv7m_nvic.c
@@ -2467,7 +2467,7 @@ static MemTxResult nvic_sysreg_write(void *opaque, hwaddr addr,
 static const MemoryRegionOps nvic_sysreg_ops = {
     .read_with_attrs = nvic_sysreg_read,
     .write_with_attrs = nvic_sysreg_write,
-    .endianness = DEVICE_NATIVE_ENDIAN,
+    .endianness = DEVICE_LITTLE_ENDIAN,
 };
 
 static int nvic_post_load(void *opaque, int version_id)