arm64: dts: renesas: r9a09g047: Add GBETH nodes

Add GBETH nodes to RZ/G3E (R9A09G047) SoC DTSI.

Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Tested-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com>
Link: https://lore.kernel.org/20250623080405.355083-3-john.madieu.xa@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi
index a0d4fab4fe0542124e99385a9f05fa6f05673a3c..e4fac7e0d764396d47a47410ad70b86b0f603ff7 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi
@@ -691,6 +691,208 @@
                        };
                };
 
+               eth0: ethernet@15c30000 {
+                       compatible = "renesas,r9a09g047-gbeth", "renesas,rzv2h-gbeth",
+                                    "snps,dwmac-5.20";
+                       reg = <0 0x15c30000 0 0x10000>;
+                       clocks = <&cpg CPG_MOD 0xbd>, <&cpg CPG_MOD 0xbc>,
+                                <&cpg CPG_CORE R9A09G047_GBETH_0_CLK_PTP_REF_I>,
+                                <&cpg CPG_MOD 0xb8>, <&cpg CPG_MOD 0xb9>,
+                                <&cpg CPG_MOD 0xba>, <&cpg CPG_MOD 0xbb>;
+                       clock-names = "stmmaceth", "pclk", "ptp_ref",
+                                     "tx", "rx", "tx-180", "rx-180";
+                       interrupts = <GIC_SPI 765 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 767 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 766 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 772 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 773 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 774 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 775 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 768 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 769 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 770 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 771 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "macirq", "eth_wake_irq", "eth_lpi",
+                                         "rx-queue-0", "rx-queue-1", "rx-queue-2",
+                                         "rx-queue-3", "tx-queue-0", "tx-queue-1",
+                                         "tx-queue-2", "tx-queue-3";
+                       resets = <&cpg 0xb0>;
+                       power-domains = <&cpg>;
+                       snps,multicast-filter-bins = <256>;
+                       snps,perfect-filter-entries = <128>;
+                       rx-fifo-depth = <8192>;
+                       tx-fifo-depth = <8192>;
+                       snps,fixed-burst;
+                       snps,no-pbl-x8;
+                       snps,force_thresh_dma_mode;
+                       snps,axi-config = <&stmmac_axi_setup>;
+                       snps,mtl-rx-config = <&mtl_rx_setup0>;
+                       snps,mtl-tx-config = <&mtl_tx_setup0>;
+                       snps,txpbl = <32>;
+                       snps,rxpbl = <32>;
+                       status = "disabled";
+
+                       mdio0: mdio {
+                               compatible = "snps,dwmac-mdio";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                       };
+
+                       mtl_rx_setup0: rx-queues-config {
+                               snps,rx-queues-to-use = <4>;
+                               snps,rx-sched-sp;
+
+                               queue0 {
+                                       snps,dcb-algorithm;
+                                       snps,priority = <0x1>;
+                                       snps,map-to-dma-channel = <0>;
+                               };
+
+                               queue1 {
+                                       snps,dcb-algorithm;
+                                       snps,priority = <0x2>;
+                                       snps,map-to-dma-channel = <1>;
+                               };
+
+                               queue2 {
+                                       snps,dcb-algorithm;
+                                       snps,priority = <0x4>;
+                                       snps,map-to-dma-channel = <2>;
+                               };
+
+                               queue3 {
+                                       snps,dcb-algorithm;
+                                       snps,priority = <0x8>;
+                                       snps,map-to-dma-channel = <3>;
+                               };
+                       };
+
+                       mtl_tx_setup0: tx-queues-config {
+                               snps,tx-queues-to-use = <4>;
+
+                               queue0 {
+                                       snps,dcb-algorithm;
+                                       snps,priority = <0x1>;
+                               };
+
+                               queue1 {
+                                       snps,dcb-algorithm;
+                                       snps,priority = <0x2>;
+                               };
+
+                               queue2 {
+                                       snps,dcb-algorithm;
+                                       snps,priority = <0x4>;
+                               };
+
+                               queue3 {
+                                       snps,dcb-algorithm;
+                                       snps,priority = <0x8>;
+                               };
+                       };
+               };
+
+               eth1: ethernet@15c40000 {
+                       compatible = "renesas,r9a09g047-gbeth", "renesas,rzv2h-gbeth",
+                                    "snps,dwmac-5.20";
+                       reg = <0 0x15c40000 0 0x10000>;
+                       clocks = <&cpg CPG_MOD 0xc3>, <&cpg CPG_MOD 0xc2>,
+                                <&cpg CPG_CORE R9A09G047_GBETH_1_CLK_PTP_REF_I>,
+                                <&cpg CPG_MOD 0xbe>, <&cpg CPG_MOD 0xbf>,
+                                <&cpg CPG_MOD 0xc0>, <&cpg CPG_MOD 0xc1>;
+                       clock-names = "stmmaceth", "pclk", "ptp_ref",
+                                     "tx", "rx", "tx-180", "rx-180";
+                       interrupts = <GIC_SPI 780 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 782 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 781 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 787 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 788 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 789 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 790 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 783 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 784 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 785 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 786 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "macirq", "eth_wake_irq", "eth_lpi",
+                                         "rx-queue-0", "rx-queue-1", "rx-queue-2",
+                                         "rx-queue-3", "tx-queue-0", "tx-queue-1",
+                                         "tx-queue-2", "tx-queue-3";
+                       resets = <&cpg 0xb1>;
+                       power-domains = <&cpg>;
+                       snps,multicast-filter-bins = <256>;
+                       snps,perfect-filter-entries = <128>;
+                       rx-fifo-depth = <8192>;
+                       tx-fifo-depth = <8192>;
+                       snps,fixed-burst;
+                       snps,no-pbl-x8;
+                       snps,force_thresh_dma_mode;
+                       snps,axi-config = <&stmmac_axi_setup>;
+                       snps,mtl-rx-config = <&mtl_rx_setup1>;
+                       snps,mtl-tx-config = <&mtl_tx_setup1>;
+                       snps,txpbl = <32>;
+                       snps,rxpbl = <32>;
+                       status = "disabled";
+
+                       mdio1: mdio {
+                               compatible = "snps,dwmac-mdio";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                       };
+
+                       mtl_rx_setup1: rx-queues-config {
+                               snps,rx-queues-to-use = <4>;
+                               snps,rx-sched-sp;
+
+                               queue0 {
+                                       snps,dcb-algorithm;
+                                       snps,priority = <0x1>;
+                                       snps,map-to-dma-channel = <0>;
+                               };
+
+                               queue1 {
+                                       snps,dcb-algorithm;
+                                       snps,priority = <0x2>;
+                                       snps,map-to-dma-channel = <1>;
+                               };
+
+                               queue2 {
+                                       snps,dcb-algorithm;
+                                       snps,priority = <0x4>;
+                                       snps,map-to-dma-channel = <2>;
+                               };
+
+                               queue3 {
+                                       snps,dcb-algorithm;
+                                       snps,priority = <0x8>;
+                                       snps,map-to-dma-channel = <3>;
+                               };
+                       };
+
+                       mtl_tx_setup1: tx-queues-config {
+                               snps,tx-queues-to-use = <4>;
+
+                               queue0 {
+                                       snps,dcb-algorithm;
+                                       snps,priority = <0x1>;
+                               };
+
+                               queue1 {
+                                       snps,dcb-algorithm;
+                                       snps,priority = <0x2>;
+                               };
+
+                               queue2 {
+                                       snps,dcb-algorithm;
+                                       snps,priority = <0x4>;
+                               };
+
+                               queue3 {
+                                       snps,dcb-algorithm;
+                                       snps,priority = <0x8>;
+                               };
+                       };
+               };
+
                cru: video@16000000 {
                        compatible = "renesas,r9a09g047-cru";
                        reg = <0 0x16000000 0 0x400>;
@@ -761,6 +963,13 @@
                };
        };
 
+       stmmac_axi_setup: stmmac-axi-config {
+               snps,lpi_en;
+               snps,wr_osr_lmt = <0xf>;
+               snps,rd_osr_lmt = <0xf>;
+               snps,blen = <16 8 4 0 0 0 0>;
+       };
+
        timer {
                compatible = "arm,armv8-timer";
                interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,