arm64: dts: qcom: x1e80100-romulus: Set up PCIe3 / SDCard reader

The Surface Laptops have a Realtek RTS5261 SD Card reader connected
over a Gen1x1 link to the PCIe3 host. Set up the necessary bits to
make it functional.

Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241129-topic-sl7_feat2-v2-2-fb6cf5660cfc@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus.dtsi b/arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus.dtsi
index 146e3700a3a34954c1653cbd8e148aeca481db6a..80fbcaea5d83e1147a74dd3320ae8fe8c953db57 100644 (file)
--- a/arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus.dtsi
@@ -767,6 +767,25 @@
        status = "okay";
 };
 
+&pcie3 {
+       perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 145 GPIO_ACTIVE_HIGH>;
+
+       pinctrl-0 = <&pcie3_default>;
+       pinctrl-names = "default";
+
+       /* The RTS5261 chip on the other side only does Gen1x1 anyway */
+       max-link-speed = <1>;
+       status = "okay";
+};
+
+&pcie3_phy {
+       vdda-phy-supply = <&vreg_l3c>;
+       vdda-pll-supply = <&vreg_l3e>;
+
+       status = "okay";
+};
+
 &pcie4 {
        status = "okay";
 };
@@ -946,6 +965,29 @@
                bias-disable;
        };
 
+       pcie3_default: pcie3-default-state {
+               perst-n-pins {
+                       pins = "gpio143";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-disable;
+               };
+
+               clkreq-n-pins {
+                       pins = "gpio144";
+                       function = "pcie3_clk";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+
+               wake-n-pins {
+                       pins = "gpio145";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
        pcie6a_default: pcie6a-default-state {
                perst-n-pins {
                        pins = "gpio152";