lib/crypto: riscv/chacha: Avoid s0/fp register

In chacha_zvkb, avoid using the s0 register, which is the frame pointer,
by reallocating KEY0 to t5. This makes stack traces available if e.g. a
crash happens in chacha_zvkb.

No frame pointer maintenance is otherwise required since this is a leaf
function.

Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn>
Fixes: bb54668837a0 ("crypto: riscv - add vector crypto accelerated ChaCha20")
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20251202-riscv-chacha_zvkb-fp-v2-1-7bd00098c9dc@iscas.ac.cn
Signed-off-by: Eric Biggers <ebiggers@kernel.org>

diff --git a/lib/crypto/riscv/chacha-riscv64-zvkb.S b/lib/crypto/riscv/chacha-riscv64-zvkb.S
index b777d0b4e379695f008b7636ed378d88c01e3120..3d183ec818f52a4c71caa6febb0b8db8d1bf5863 100644 (file)
--- a/lib/crypto/riscv/chacha-riscv64-zvkb.S
+++ b/lib/crypto/riscv/chacha-riscv64-zvkb.S
@@ -60,7 +60,8 @@
 #define VL             t2
 #define STRIDE         t3
 #define ROUND_CTR      t4
-#define KEY0           s0
+#define KEY0           t5
+// Avoid s0/fp to allow for unwinding
 #define KEY1           s1
 #define KEY2           s2
 #define KEY3           s3
@@ -143,7 +144,6 @@
 // The updated 32-bit counter is written back to state->x[12] before returning.
 SYM_FUNC_START(chacha_zvkb)
        addi            sp, sp, -96
-       sd              s0, 0(sp)
        sd              s1, 8(sp)
        sd              s2, 16(sp)
        sd              s3, 24(sp)
@@ -280,7 +280,6 @@ SYM_FUNC_START(chacha_zvkb)
        bnez            NBLOCKS, .Lblock_loop
 
        sw              COUNTER, 48(STATEP)
-       ld              s0, 0(sp)
        ld              s1, 8(sp)
        ld              s2, 16(sp)
        ld              s3, 24(sp)