clk: renesas: rzv2h: Update error message

Update the error message in `rzv2h_mod_clock_endisable()` to provide
clearer debugging information. Instead of printing only the register
address, include both the `GET_CLK_ON_OFFSET(reg)` offset and the
corresponding `clk` name (`%pC`). This enhances readability and aids
in debugging clock enable failures.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250211105603.195905-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/drivers/clk/renesas/rzv2h-cpg.c b/drivers/clk/renesas/rzv2h-cpg.c
index a4c1e92e1fd7653035e5e4557138672674101333..419dc8cd2766f77ec636aaec05b79bf1907c096d 100644 (file)
--- a/drivers/clk/renesas/rzv2h-cpg.c
+++ b/drivers/clk/renesas/rzv2h-cpg.c
@@ -541,8 +541,8 @@ static int rzv2h_mod_clock_endisable(struct clk_hw *hw, bool enable)
        error = readl_poll_timeout_atomic(priv->base + reg, value,
                                          value & bitmask, 0, 10);
        if (error)
-               dev_err(dev, "Failed to enable CLK_ON %p\n",
-                       priv->base + reg);
+               dev_err(dev, "Failed to enable CLK_ON 0x%x/%pC\n",
+                       GET_CLK_ON_OFFSET(clock->on_index), hw->clk);
 
        return error;
 }