]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
CRIS-LRA: Fix uses of reload_in_progress
authorHans-Peter Nilsson <hp@axis.com>
Mon, 30 Jan 2023 00:53:19 +0000 (01:53 +0100)
committerHans-Peter Nilsson <hp@bitrange.com>
Thu, 4 May 2023 00:05:26 +0000 (02:05 +0200)
This shows no difference neither in arith-rand-ll nor coremark
numbers.  Comparing libgcc and newlib libc before/after, the only
difference can be seen in a few functions where it's mostly neutral
(newlib's _svfprintf_r et al) and one function (__gdtoa), which
improves ever so slightly (four bytes less; one load less, but one
instruction reading from memory instead of a register).

* config/cris/cris.cc (cris_side_effect_mode_ok): Use
lra_in_progress, not reload_in_progress.
* config/cris/cris.md ("movdi", "*addi_reload"): Ditto.
* config/cris/constraints.md ("Q"): Ditto.

gcc/config/cris/constraints.md
gcc/config/cris/cris.cc
gcc/config/cris/cris.md

index fa9aa19d13e38a08ac9867245952490d9081a867..3df8cc27d8d46b849b165f9e6f348acab88bad5e 100644 (file)
@@ -96,7 +96,7 @@
 (define_memory_constraint "Q"
   "@internal"
   (and (match_code "mem")
-       (match_test "cris_base_p (XEXP (op, 0), reload_in_progress
+       (match_test "cris_base_p (XEXP (op, 0), lra_in_progress
                                               || reload_completed)")))
 
 ;; Extra constraints.
            ;; Double indirect: [[reg]] or [[reg+]]?
        (ior (and (match_code "mem" "0")
                 (match_test "cris_base_or_autoincr_p (XEXP (XEXP (op, 0), 0),
-                                                      reload_in_progress
+                                                      lra_in_progress
                                                       || reload_completed)"))
            ;; Just an explicit indirect reference: [const]?
            (match_test "CONSTANT_P (XEXP (op, 0))")
            (and (match_code "plus" "0")
                      ;; A BDAP constant: [reg+(8|16|32)bit offset]?
                 (ior (and (match_test "cris_base_p (XEXP (XEXP (op, 0), 0),
-                                                    reload_in_progress
+                                                    lra_in_progress
                                                     || reload_completed)")
                           (match_test "CONSTANT_P (XEXP (XEXP (op, 0), 1))"))
                      ;; A BDAP register: [reg+[reg(+)].S]?
                      (and (match_test "cris_base_p (XEXP (XEXP (op, 0), 0),
-                                                    reload_in_progress
+                                                    lra_in_progress
                                                     || reload_completed)")
                           (match_test "cris_bdap_index_p (XEXP (XEXP (op, 0), 1),
-                                                          reload_in_progress
+                                                          lra_in_progress
                                                           || reload_completed)"))
                      ;; Same, but with swapped arguments (no canonical
                      ;; ordering between e.g. REG and MEM as of LAST_UPDATED
                      ;; "Thu May 12 03:59:11 UTC 2005").
                      (and (match_test "cris_base_p (XEXP (XEXP (op, 0), 1),
-                                                    reload_in_progress
+                                                    lra_in_progress
                                                     || reload_completed)")
                           (match_test "cris_bdap_index_p (XEXP (XEXP (op, 0), 0),
-                                                          reload_in_progress
+                                                          lra_in_progress
                                                           || reload_completed)"))
                      ;; A BIAP: [reg+reg.S] (MULT comes first).
                      (and (match_test "cris_base_p (XEXP (XEXP (op, 0), 1),
-                                                    reload_in_progress
+                                                    lra_in_progress
                                                     || reload_completed)")
                           (match_test "cris_biap_index_p (XEXP (XEXP (op, 0), 0),
-                                                          reload_in_progress
+                                                          lra_in_progress
                                                           || reload_completed)")))))))
index 7ce1b754e76ec2aad4a9e5d359392a83ace77b10..3013e01f22ace8e138e15a4b76bbc07acb2bf023 100644 (file)
@@ -2134,12 +2134,12 @@ cris_side_effect_mode_ok (enum rtx_code code, rtx *ops,
   /* The operands may be swapped.  Canonicalize them in reg_rtx and
      val_rtx, where reg_rtx always is a reg (for this constraint to
      match).  */
-  if (! cris_base_p (reg_rtx, reload_in_progress || reload_completed))
+  if (! cris_base_p (reg_rtx, lra_in_progress || reload_completed))
     reg_rtx = val_rtx, val_rtx = ops[rreg];
 
   /* Don't forget to check that reg_rtx really is a reg.  If it isn't,
      we have no business.  */
-  if (! cris_base_p (reg_rtx, reload_in_progress || reload_completed))
+  if (! cris_base_p (reg_rtx, lra_in_progress || reload_completed))
     return 0;
 
   /* Don't do this when -mno-split.  */
@@ -2164,9 +2164,9 @@ cris_side_effect_mode_ok (enum rtx_code code, rtx *ops,
       /* Check if the lvalue register is the same as the "other
         operand".  If so, the result is undefined and we shouldn't do
         this.  FIXME:  Check again.  */
-      if ((cris_base_p (ops[lreg], reload_in_progress || reload_completed)
+      if ((cris_base_p (ops[lreg], lra_in_progress || reload_completed)
           && cris_base_p (ops[other_op],
-                          reload_in_progress || reload_completed)
+                          lra_in_progress || reload_completed)
           && REGNO (ops[lreg]) == REGNO (ops[other_op]))
          || rtx_equal_p (ops[other_op], ops[lreg]))
       return 0;
@@ -2179,7 +2179,7 @@ cris_side_effect_mode_ok (enum rtx_code code, rtx *ops,
     return 0;
 
   if (code == PLUS
-      && ! cris_base_p (val_rtx, reload_in_progress || reload_completed))
+      && ! cris_base_p (val_rtx, lra_in_progress || reload_completed))
     {
 
       /* Do not allow rx = rx + n if a normal add or sub with same size
@@ -2195,13 +2195,13 @@ cris_side_effect_mode_ok (enum rtx_code code, rtx *ops,
 
       if (MEM_P (val_rtx)
          && cris_base_or_autoincr_p (XEXP (val_rtx, 0),
-                                     reload_in_progress || reload_completed))
+                                     lra_in_progress || reload_completed))
        return 1;
 
       if (GET_CODE (val_rtx) == SIGN_EXTEND
          && MEM_P (XEXP (val_rtx, 0))
          && cris_base_or_autoincr_p (XEXP (XEXP (val_rtx, 0), 0),
-                                     reload_in_progress || reload_completed))
+                                     lra_in_progress || reload_completed))
        return 1;
 
       /* If we got here, it's not a valid addressing mode.  */
@@ -2210,7 +2210,7 @@ cris_side_effect_mode_ok (enum rtx_code code, rtx *ops,
   else if (code == MULT
           || (code == PLUS
               && cris_base_p (val_rtx,
-                              reload_in_progress || reload_completed)))
+                              lra_in_progress || reload_completed)))
     {
       /* Do not allow rx = rx + ry.S, since it doesn't give better code.  */
       if (rtx_equal_p (ops[lreg], reg_rtx)
@@ -2222,7 +2222,7 @@ cris_side_effect_mode_ok (enum rtx_code code, rtx *ops,
        return 0;
 
       /* Only allow  r + ...  */
-      if (! cris_base_p (reg_rtx, reload_in_progress || reload_completed))
+      if (! cris_base_p (reg_rtx, lra_in_progress || reload_completed))
        return 0;
 
       /* If we got here, all seems ok.
index 366b4bc304bfd09681d7a47224298e48b0caacbe..3796a78480cb9b0015456087adc9e0be04caef29 100644 (file)
      emitted) is the final value.  */
   if ((CONST_INT_P (operands[1]) || GET_CODE (operands[1]) == CONST_DOUBLE)
       && ! reload_completed
-      && ! reload_in_progress)
+      && ! lra_in_progress)
     {
       rtx insns;
       rtx op0 = operands[0];
    && operands[1] != frame_pointer_rtx
    && CONST_INT_P (operands[3])
    && (INTVAL (operands[3]) == 2 || INTVAL (operands[3]) == 4)
-   && (reload_in_progress || reload_completed)"
+   && (lra_in_progress || reload_completed)"
   "#"
   "&& 1"
   [(set (match_dup 0)