]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: qcom: pm8550vs: Disable different PMIC SIDs by default
authorLuca Weiss <luca.weiss@fairphone.com>
Wed, 10 Dec 2025 01:43:29 +0000 (10:43 +0900)
committerBjorn Andersson <andersson@kernel.org>
Mon, 5 Jan 2026 22:31:39 +0000 (16:31 -0600)
Keep the different PMIC definitions in pm8550vs.dtsi disabled by
default, and only enable them in boards explicitly.

This allows to support boards better which only have pm8550vs_c, like
the Milos/SM7635-based Fairphone (Gen. 6).

Note: I assume that at least some of these devices with PM8550VS also
don't have _c, _d, _e and _g, but this patch is keeping the resulting
devicetree the same as before this change, disabling them on boards that
don't actually have those is out of scope for this patch.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20251210-sm7635-fp6-initial-v4-5-b05fddd8b45c@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/pm8550vs.dtsi
arch/arm64/boot/dts/qcom/qcs8550-aim300.dtsi
arch/arm64/boot/dts/qcom/sm8550-hdk.dts
arch/arm64/boot/dts/qcom/sm8550-mtp.dts
arch/arm64/boot/dts/qcom/sm8550-qrd.dts
arch/arm64/boot/dts/qcom/sm8550-samsung-q5q.dts
arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts
arch/arm64/boot/dts/qcom/sm8650-hdk.dts
arch/arm64/boot/dts/qcom/sm8650-mtp.dts
arch/arm64/boot/dts/qcom/sm8650-qrd.dts

index 6426b431616bde2d960780be2bed4c623af246c2..7b5898c263ad8a687e8c914fbb0072c58799b6b2 100644 (file)
@@ -98,6 +98,8 @@
                #address-cells = <1>;
                #size-cells = <0>;
 
+               status = "disabled";
+
                pm8550vs_c_temp_alarm: temp-alarm@a00 {
                        compatible = "qcom,spmi-temp-alarm";
                        reg = <0xa00>;
                #address-cells = <1>;
                #size-cells = <0>;
 
+               status = "disabled";
+
                pm8550vs_d_temp_alarm: temp-alarm@a00 {
                        compatible = "qcom,spmi-temp-alarm";
                        reg = <0xa00>;
                #address-cells = <1>;
                #size-cells = <0>;
 
+               status = "disabled";
+
                pm8550vs_e_temp_alarm: temp-alarm@a00 {
                        compatible = "qcom,spmi-temp-alarm";
                        reg = <0xa00>;
                #address-cells = <1>;
                #size-cells = <0>;
 
+               status = "disabled";
+
                pm8550vs_g_temp_alarm: temp-alarm@a00 {
                        compatible = "qcom,spmi-temp-alarm";
                        reg = <0xa00>;
index e6ac529e6b7216ac4b9e10900c5ddc9a06c9011c..e6ebb643203b62ba0050d11930576023207a2e35 100644 (file)
        vdd3-supply = <&vreg_l5b_3p1>;
 };
 
+&pm8550vs_c {
+       status = "okay";
+};
+
+&pm8550vs_d {
+       status = "okay";
+};
+
+&pm8550vs_e {
+       status = "okay";
+};
+
+&pm8550vs_g {
+       status = "okay";
+};
+
 &sleep_clk {
        clock-frequency = <32764>;
 };
index 599850c48494b1daae9508068a153f24fe3bfa91..ee13e6136a8259d28540e718851e094f74ead278 100644 (file)
        vdd3-supply = <&vreg_l5b_3p1>;
 };
 
+&pm8550vs_c {
+       status = "okay";
+};
+
+&pm8550vs_d {
+       status = "okay";
+};
+
+&pm8550vs_e {
+       status = "okay";
+};
+
+&pm8550vs_g {
+       status = "okay";
+};
+
 &pon_pwrkey {
        status = "okay";
 };
index f430038bd402c76aef0b4bb069c5e62f8abba969..94ed1c2218563a10104f26f78b4f1063981a2d16 100644 (file)
        vdd3-supply = <&vreg_l5b_3p1>;
 };
 
+&pm8550vs_c {
+       status = "okay";
+};
+
+&pm8550vs_d {
+       status = "okay";
+};
+
+&pm8550vs_e {
+       status = "okay";
+};
+
+&pm8550vs_g {
+       status = "okay";
+};
+
 &qupv3_id_0 {
        status = "okay";
 };
index 3d35a9c6fdb0283883503a825462eb8c38a0bd76..c35d4737a4121cecc24027ff2622c97dd9f4b7f5 100644 (file)
        vdd3-supply = <&vreg_l5b_3p1>;
 };
 
+&pm8550vs_c {
+       status = "okay";
+};
+
+&pm8550vs_d {
+       status = "okay";
+};
+
+&pm8550vs_e {
+       status = "okay";
+};
+
+&pm8550vs_g {
+       status = "okay";
+};
+
 &pon_pwrkey {
        status = "okay";
 };
index b4ef40ae2cd956d2c0a1e46d6428aaa6e5d9c4ee..81c02ee27fe998a489d6a3fa67c946987a0ca88c 100644 (file)
        };
 };
 
+&pm8550vs_c {
+       status = "okay";
+};
+
+&pm8550vs_d {
+       status = "okay";
+};
+
+&pm8550vs_e {
+       status = "okay";
+};
+
+&pm8550vs_g {
+       status = "okay";
+};
+
 &pon_pwrkey {
        status = "okay";
 };
index d90dc7b37c4a74cbfb03c929646fda3381413084..0e6ed6fce614706590ab37eb96c1077622d0d532 100644 (file)
        };
 };
 
+&pm8550vs_c {
+       status = "okay";
+};
+
+&pm8550vs_d {
+       status = "okay";
+};
+
+&pm8550vs_e {
+       status = "okay";
+};
+
+&pm8550vs_g {
+       status = "okay";
+};
+
 &pm8550vs_g_gpios {
        cam_pwr_a_cs: cam-pwr-a-cs-state {
                pins = "gpio4";
index 5bf1af3308ceb647f031deb9f8755c830aa90c37..eabc828c05b4c5a70c04f621046c8ee713055be4 100644 (file)
        vdd3-supply = <&vreg_l5b_3p1>;
 };
 
+&pm8550vs_c {
+       status = "okay";
+};
+
+&pm8550vs_d {
+       status = "okay";
+};
+
+&pm8550vs_e {
+       status = "okay";
+};
+
+&pm8550vs_g {
+       status = "okay";
+};
+
 &pon_pwrkey {
        status = "okay";
 };
index c67bbace27439ad67cfb247a88aec633f93f5a6d..bb688a5d21c2d0c8b9fd4ff29e8d85ef9e271883 100644 (file)
        vdd3-supply = <&vreg_l5b_3p1>;
 };
 
+&pm8550vs_c {
+       status = "okay";
+};
+
+&pm8550vs_d {
+       status = "okay";
+};
+
+&pm8550vs_e {
+       status = "okay";
+};
+
+&pm8550vs_g {
+       status = "okay";
+};
+
 &qupv3_id_1 {
        status = "okay";
 };
index f990e68c7a870d397b12a94802a400f1bd76aa60..087828c60692c6d8a90419cea29f376001643010 100644 (file)
        vdd3-supply = <&vreg_l5b_3p1>;
 };
 
+&pm8550vs_c {
+       status = "okay";
+};
+
+&pm8550vs_d {
+       status = "okay";
+};
+
+&pm8550vs_e {
+       status = "okay";
+};
+
+&pm8550vs_g {
+       status = "okay";
+};
+
 &qup_i2c3_data_clk {
        /* Use internal I2C pull-up */
        bias-pull-up = <2200>;