]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/amdgpu: Update AMDGPU_INFO_UQ_FW_AREAS query for compute
authorAlex Deucher <alexander.deucher@amd.com>
Fri, 10 Oct 2025 20:44:58 +0000 (16:44 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 5 Jan 2026 21:20:39 +0000 (16:20 -0500)
Add a query for compute queues.  Userspace can use this to
query the size of the EOP buffers for compute user queues.

Proposed userspace:
https://gitlab.freedesktop.org/yogeshmohan/mesa/-/commits/userq_query

Reviewed-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
include/uapi/drm/amdgpu_drm.h

index 6ee77f431d568e1a9ed559fc24ca542352bacf14..b02da84ab99d1c52ef6398579a9208196a13812b 100644 (file)
@@ -391,6 +391,24 @@ static int amdgpu_userq_metadata_info_gfx(struct amdgpu_device *adev,
        return ret;
 }
 
+static int amdgpu_userq_metadata_info_compute(struct amdgpu_device *adev,
+                                             struct drm_amdgpu_info *info,
+                                             struct drm_amdgpu_info_uq_metadata_compute *meta)
+{
+       int ret = -EOPNOTSUPP;
+
+       if (adev->gfx.funcs->get_gfx_shadow_info) {
+               struct amdgpu_gfx_shadow_info shadow = {};
+
+               adev->gfx.funcs->get_gfx_shadow_info(adev, &shadow, true);
+               meta->eop_size = shadow.eop_size;
+               meta->eop_alignment = shadow.eop_alignment;
+               ret = 0;
+       }
+
+       return ret;
+}
+
 static int amdgpu_hw_ip_info(struct amdgpu_device *adev,
                             struct drm_amdgpu_info *info,
                             struct drm_amdgpu_info_hw_ip *result)
@@ -1360,6 +1378,14 @@ out:
                        if (ret)
                                return ret;
 
+                       ret = copy_to_user(out, &meta_info,
+                                               min((size_t)size, sizeof(meta_info))) ? -EFAULT : 0;
+                       return 0;
+               case AMDGPU_HW_IP_COMPUTE:
+                       ret = amdgpu_userq_metadata_info_compute(adev, info, &meta_info.compute);
+                       if (ret)
+                               return ret;
+
                        ret = copy_to_user(out, &meta_info,
                                                min((size_t)size, sizeof(meta_info))) ? -EFAULT : 0;
                        return 0;
index 351c2fb2df900270c3f0030fb22851959310e74d..138d9ae1aa489027adf1317cc3506562347675c0 100644 (file)
@@ -1630,9 +1630,17 @@ struct drm_amdgpu_info_uq_metadata_gfx {
        __u32 csa_alignment;
 };
 
+struct drm_amdgpu_info_uq_metadata_compute {
+       /* EOP size for gfx11 */
+       __u32 eop_size;
+       /* EOP base virtual alignment for gfx11 */
+       __u32 eop_alignment;
+};
+
 struct drm_amdgpu_info_uq_metadata {
        union {
                struct drm_amdgpu_info_uq_metadata_gfx gfx;
+               struct drm_amdgpu_info_uq_metadata_compute compute;
        };
 };