endif()
elseif(CMAKE_C_COMPILER_ID MATCHES "GNU" OR CMAKE_C_COMPILER_ID MATCHES "Clang")
# Enable warnings in GCC and Clang
- set(WARNFLAGS "-Wall")
- set(WARNFLAGS_MAINTAINER "-Wextra -Wpedantic")
- set(WARNFLAGS_DISABLE "-Wno-implicit-fallthrough")
+ set(WARNFLAGS "-Wall")
+ set(WARNFLAGS_MAINTAINER "-Wextra -Wpedantic")
+ set(WARNFLAGS_DISABLE "-Wno-implicit-fallthrough")
if(WITH_NATIVE_INSTRUCTIONS)
- if(BASEARCH_PPC_FOUND)
- set(NATIVEFLAG "-mcpu=native")
- else()
- set(NATIVEFLAG "-march=native")
- endif()
+ if(BASEARCH_PPC_FOUND)
+ set(NATIVEFLAG "-mcpu=native")
else()
- if(BASEARCH_ARM_FOUND)
- if("${ARCH}" MATCHES "arm" AND NOT CMAKE_C_FLAGS MATCHES "-mfloat-abi")
- # Auto-detect support for ARM floating point ABI
- check_c_compiler_flag(-mfloat-abi=softfp HAVE_FLOATABI_SOFTFP)
- if(HAVE_FLOATABI_SOFTFP)
- set(FLOATABI "-mfloat-abi=softfp")
- else()
- check_c_compiler_flag(-mfloat-abi=hard HAVE_FLOATABI_HARD)
- if(HAVE_FLOATABI_HARD)
- set(FLOATABI "-mfloat-abi=hard")
- endif()
- endif()
- if(FLOATABI)
- message(STATUS "ARM floating point arch: ${FLOATABI}")
- set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} ${FLOATABI}")
- else()
- message(STATUS "ARM floating point arch not auto-detected")
+ set(NATIVEFLAG "-march=native")
+ endif()
+ else()
+ if(BASEARCH_ARM_FOUND)
+ if("${ARCH}" MATCHES "arm" AND NOT CMAKE_C_FLAGS MATCHES "-mfloat-abi")
+ # Auto-detect support for ARM floating point ABI
+ check_c_compiler_flag(-mfloat-abi=softfp HAVE_FLOATABI_SOFTFP)
+ if(HAVE_FLOATABI_SOFTFP)
+ set(FLOATABI "-mfloat-abi=softfp")
+ else()
+ check_c_compiler_flag(-mfloat-abi=hard HAVE_FLOATABI_HARD)
+ if(HAVE_FLOATABI_HARD)
+ set(FLOATABI "-mfloat-abi=hard")
endif()
endif()
- endif()
- # Check whether -fno-lto is available
- set(CMAKE_REQUIRED_FLAGS "-fno-lto")
- check_c_source_compiles(
- "int main() { return 0; }"
- FNO_LTO_AVAILABLE FAIL_REGEX "not supported")
- set(CMAKE_REQUIRED_FLAGS)
- if(FNO_LTO_AVAILABLE)
- set(NOLTOFLAG "-fno-lto")
+ if(FLOATABI)
+ message(STATUS "ARM floating point arch: ${FLOATABI}")
+ set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} ${FLOATABI}")
+ else()
+ message(STATUS "ARM floating point arch not auto-detected")
+ endif()
endif()
endif()
+ # Check whether -fno-lto is available
+ set(CMAKE_REQUIRED_FLAGS "-fno-lto")
+ check_c_source_compiles(
+ "int main() { return 0; }"
+ FNO_LTO_AVAILABLE FAIL_REGEX "not supported")
+ set(CMAKE_REQUIRED_FLAGS)
+ if(FNO_LTO_AVAILABLE)
+ set(NOLTOFLAG "-fno-lto")
+ endif()
+ endif()
else()
if(WITH_NATIVE_INSTRUCTIONS)
message(STATUS "Ignoring WITH_NATIVE_INSTRUCTIONS; not implemented yet on this configuration")
if(WITH_ACLE AND NOT MSVC)
check_acle_intrinsics()
if(HAVE_ACLE_INTRIN)
- add_definitions(-DARM_ACLE_CRC_HASH)
- set(ACLE_SRCS ${ARCHDIR}/crc32_acle.c ${ARCHDIR}/insert_string_acle.c)
- set_property(SOURCE ${ACLE_SRCS} PROPERTY COMPILE_FLAGS "${ACLEFLAG} ${NOLTOFLAG}")
- list(APPEND ZLIB_ARCH_SRCS ${ACLE_SRCS})
- add_feature_info(ACLE_CRC 1 "Support ACLE optimized CRC hash generation, using \"${ACLEFLAG}\"")
- endif()
+ add_definitions(-DARM_ACLE_CRC_HASH)
+ set(ACLE_SRCS ${ARCHDIR}/crc32_acle.c ${ARCHDIR}/insert_string_acle.c)
+ set_property(SOURCE ${ACLE_SRCS} PROPERTY COMPILE_FLAGS "${ACLEFLAG} ${NOLTOFLAG}")
+ list(APPEND ZLIB_ARCH_SRCS ${ACLE_SRCS})
+ add_feature_info(ACLE_CRC 1 "Support ACLE optimized CRC hash generation, using \"${ACLEFLAG}\"")
+ endif()
endif()
if(WITH_NEON)
check_neon_intrinsics()
if(MFPU_NEON_AVAILABLE)
- add_definitions(-DARM_NEON_ADLER32 -DARM_NEON_CHUNKSET -DARM_NEON_SLIDEHASH)
- set(NEON_SRCS ${ARCHDIR}/adler32_neon.c ${ARCHDIR}/chunkset_neon.c ${ARCHDIR}/slide_neon.c)
- list(APPEND ZLIB_ARCH_SRCS ${NEON_SRCS})
- set_property(SOURCE ${NEON_SRCS} PROPERTY COMPILE_FLAGS "${NEONFLAG} ${NOLTOFLAG}")
- if(MSVC)
- add_definitions(-D__ARM_NEON__)
+ add_definitions(-DARM_NEON_ADLER32 -DARM_NEON_CHUNKSET -DARM_NEON_SLIDEHASH)
+ set(NEON_SRCS ${ARCHDIR}/adler32_neon.c ${ARCHDIR}/chunkset_neon.c ${ARCHDIR}/slide_neon.c)
+ list(APPEND ZLIB_ARCH_SRCS ${NEON_SRCS})
+ set_property(SOURCE ${NEON_SRCS} PROPERTY COMPILE_FLAGS "${NEONFLAG} ${NOLTOFLAG}")
+ if(MSVC)
+ add_definitions(-D__ARM_NEON__)
+ endif()
+ add_feature_info(NEON_ADLER32 1 "Support NEON instructions in adler32, using \"${NEONFLAG}\"")
+ add_feature_info(NEON_SLIDEHASH 1 "Support NEON instructions in slide_hash, using \"${NEONFLAG}\"")
endif()
- add_feature_info(NEON_ADLER32 1 "Support NEON instructions in adler32, using \"${NEONFLAG}\"")
- add_feature_info(NEON_SLIDEHASH 1 "Support NEON instructions in slide_hash, using \"${NEONFLAG}\"")
- endif()
endif()
elseif(BASEARCH_PPC_FOUND)
if(WITH_POWER8)
check_power8_intrinsics()
if(HAVE_POWER8_INTRIN)
- add_definitions(-DPOWER8)
- add_definitions(-DPOWER_FEATURES)
- add_definitions(-DPOWER8_VSX_ADLER32)
- add_definitions(-DPOWER8_VSX_SLIDEHASH)
- list(APPEND ZLIB_ARCH_HDRS ${ARCHDIR}/power.h)
- list(APPEND ZLIB_ARCH_SRCS ${ARCHDIR}/power.c)
- set(POWER8_SRCS ${ARCHDIR}/adler32_power8.c ${ARCHDIR}/slide_power8.c)
- list(APPEND ZLIB_ARCH_SRCS ${POWER8_SRCS})
- set_property(SOURCE ${POWER8_SRCS} PROPERTY COMPILE_FLAGS "${POWER8FLAG} ${NOLTOFLAG}")
- endif()
+ add_definitions(-DPOWER8)
+ add_definitions(-DPOWER_FEATURES)
+ add_definitions(-DPOWER8_VSX_ADLER32)
+ add_definitions(-DPOWER8_VSX_SLIDEHASH)
+ list(APPEND ZLIB_ARCH_HDRS ${ARCHDIR}/power.h)
+ list(APPEND ZLIB_ARCH_SRCS ${ARCHDIR}/power.c)
+ set(POWER8_SRCS ${ARCHDIR}/adler32_power8.c ${ARCHDIR}/slide_power8.c)
+ list(APPEND ZLIB_ARCH_SRCS ${POWER8_SRCS})
+ set_property(SOURCE ${POWER8_SRCS} PROPERTY COMPILE_FLAGS "${POWER8FLAG} ${NOLTOFLAG}")
+ endif()
endif()
elseif(BASEARCH_S360_FOUND)
if(WITH_DFLTCC_DEFLATE OR WITH_DFLTCC_INFLATE)
endif()
if(WITH_AVX2)
check_avx2_intrinsics()
- if(HAVE_AVX2_INTRIN)
- add_definitions(-DX86_AVX2 -DX86_AVX2_ADLER32 -DX86_AVX_CHUNKSET)
- set(AVX2_SRCS ${ARCHDIR}/slide_avx.c)
- add_feature_info(AVX2_SLIDEHASH 1 "Support AVX2 optimized slide_hash, using \"${AVX2FLAG}\"")
- list(APPEND AVX2_SRCS ${ARCHDIR}/chunkset_avx.c)
- add_feature_info(AVX_CHUNKSET 1 "Support AVX optimized chunkset, using \"${AVX2FLAG}\"")
- list(APPEND AVX2_SRCS ${ARCHDIR}/compare258_avx.c)
- add_feature_info(AVX2_COMPARE258 1 "Support AVX2 optimized compare258, using \"${AVX2FLAG}\"")
- list(APPEND AVX2_SRCS ${ARCHDIR}/adler32_avx.c)
- add_feature_info(AVX2_ADLER32 1 "Support AVX2-accelerated adler32, using \"${AVX2FLAG}\"")
- list(APPEND ZLIB_ARCH_SRCS ${AVX2_SRCS})
- set_property(SOURCE ${AVX2_SRCS} PROPERTY COMPILE_FLAGS "${AVX2FLAG} ${NOLTOFLAG}")
- endif()
+ if(HAVE_AVX2_INTRIN)
+ add_definitions(-DX86_AVX2 -DX86_AVX2_ADLER32 -DX86_AVX_CHUNKSET)
+ set(AVX2_SRCS ${ARCHDIR}/slide_avx.c)
+ add_feature_info(AVX2_SLIDEHASH 1 "Support AVX2 optimized slide_hash, using \"${AVX2FLAG}\"")
+ list(APPEND AVX2_SRCS ${ARCHDIR}/chunkset_avx.c)
+ add_feature_info(AVX_CHUNKSET 1 "Support AVX optimized chunkset, using \"${AVX2FLAG}\"")
+ list(APPEND AVX2_SRCS ${ARCHDIR}/compare258_avx.c)
+ add_feature_info(AVX2_COMPARE258 1 "Support AVX2 optimized compare258, using \"${AVX2FLAG}\"")
+ list(APPEND AVX2_SRCS ${ARCHDIR}/adler32_avx.c)
+ add_feature_info(AVX2_ADLER32 1 "Support AVX2-accelerated adler32, using \"${AVX2FLAG}\"")
+ list(APPEND ZLIB_ARCH_SRCS ${AVX2_SRCS})
+ set_property(SOURCE ${AVX2_SRCS} PROPERTY COMPILE_FLAGS "${AVX2FLAG} ${NOLTOFLAG}")
+ endif()
endif()
if(WITH_SSE4)
check_sse4_intrinsics()
if(HAVE_SSE42CRC_INLINE_ASM OR HAVE_SSE42CRC_INTRIN)
- add_definitions(-DX86_SSE42_CRC_HASH)
- set(SSE42_SRCS ${ARCHDIR}/insert_string_sse.c)
- add_feature_info(SSE42_CRC 1 "Support SSE4.2 optimized CRC hash generation, using \"${SSE4FLAG}\"")
- list(APPEND ZLIB_ARCH_SRCS ${SSE42_SRCS})
- set_property(SOURCE ${SSE42_SRCS} PROPERTY COMPILE_FLAGS "${SSE4FLAG} ${NOLTOFLAG}")
- if(HAVE_SSE42CRC_INTRIN)
- add_definitions(-DX86_SSE42_CRC_INTRIN)
+ add_definitions(-DX86_SSE42_CRC_HASH)
+ set(SSE42_SRCS ${ARCHDIR}/insert_string_sse.c)
+ add_feature_info(SSE42_CRC 1 "Support SSE4.2 optimized CRC hash generation, using \"${SSE4FLAG}\"")
+ list(APPEND ZLIB_ARCH_SRCS ${SSE42_SRCS})
+ set_property(SOURCE ${SSE42_SRCS} PROPERTY COMPILE_FLAGS "${SSE4FLAG} ${NOLTOFLAG}")
+ if(HAVE_SSE42CRC_INTRIN)
+ add_definitions(-DX86_SSE42_CRC_INTRIN)
+ endif()
+ endif()
+ if(HAVE_SSE42CMPSTR_INTRIN)
+ add_definitions(-DX86_SSE42_CMP_STR)
+ set(SSE42_SRCS ${ARCHDIR}/compare258_sse.c)
+ add_feature_info(SSE42_COMPARE258 1 "Support SSE4.2 optimized compare258, using \"${SSE4FLAG}\"")
+ list(APPEND ZLIB_ARCH_SRCS ${SSE42_SRCS})
+ set_property(SOURCE ${SSE42_SRCS} PROPERTY COMPILE_FLAGS "${SSE4FLAG} ${NOLTOFLAG}")
endif()
- endif()
- if(WITH_SSE4 AND HAVE_SSE42CMPSTR_INTRIN)
- add_definitions(-DX86_SSE42_CMP_STR)
- set(SSE42_SRCS ${ARCHDIR}/compare258_sse.c)
- add_feature_info(SSE42_COMPARE258 1 "Support SSE4.2 optimized compare258, using \"${SSE4FLAG}\"")
- list(APPEND ZLIB_ARCH_SRCS ${SSE42_SRCS})
- set_property(SOURCE ${SSE42_SRCS} PROPERTY COMPILE_FLAGS "${SSE4FLAG} ${NOLTOFLAG}")
- endif()
endif()
if(WITH_SSE2)
check_sse2_intrinsics()
if(HAVE_SSE2_INTRIN)
- add_definitions(-DX86_SSE2 -DX86_SSE2_CHUNKSET -DX86_SSE2_SLIDEHASH)
- set(SSE2_SRCS ${ARCHDIR}/chunkset_sse.c ${ARCHDIR}/slide_sse.c)
- list(APPEND ZLIB_ARCH_SRCS ${SSE2_SRCS})
- if(NOT ${ARCH} MATCHES "x86_64")
- set_property(SOURCE ${SSE2_SRCS} PROPERTY COMPILE_FLAGS "${SSE2FLAG} ${NOLTOFLAG}")
- add_feature_info(FORCE_SSE2 FORCE_SSE2 "Assume CPU is SSE2 capable")
- if(FORCE_SSE2)
- add_definitions(-DX86_NOCHECK_SSE2)
+ add_definitions(-DX86_SSE2 -DX86_SSE2_CHUNKSET -DX86_SSE2_SLIDEHASH)
+ set(SSE2_SRCS ${ARCHDIR}/chunkset_sse.c ${ARCHDIR}/slide_sse.c)
+ list(APPEND ZLIB_ARCH_SRCS ${SSE2_SRCS})
+ if(NOT ${ARCH} MATCHES "x86_64")
+ set_property(SOURCE ${SSE2_SRCS} PROPERTY COMPILE_FLAGS "${SSE2FLAG} ${NOLTOFLAG}")
+ add_feature_info(FORCE_SSE2 FORCE_SSE2 "Assume CPU is SSE2 capable")
+ if(FORCE_SSE2)
+ add_definitions(-DX86_NOCHECK_SSE2)
+ endif()
endif()
endif()
endif()
- endif()
if(WITH_SSSE3)
check_ssse3_intrinsics()
if(HAVE_SSSE3_INTRIN)
- add_definitions(-DX86_SSSE3 -DX86_SSSE3_ADLER32)
- set(SSSE3_SRCS ${ARCHDIR}/adler32_ssse3.c)
- add_feature_info(SSSE3_ADLER32 1 "Support SSSE3-accelerated adler32, using \"${SSSE3FLAG}\"")
- list(APPEND ZLIB_ARCH_SRCS ${SSSE3_SRCS})
- set_property(SOURCE ${SSSE3_SRCS} PROPERTY COMPILE_FLAGS "${SSSE3FLAG} ${NOLTOFLAG}")
- endif()
+ add_definitions(-DX86_SSSE3 -DX86_SSSE3_ADLER32)
+ set(SSSE3_SRCS ${ARCHDIR}/adler32_ssse3.c)
+ add_feature_info(SSSE3_ADLER32 1 "Support SSSE3-accelerated adler32, using \"${SSSE3FLAG}\"")
+ list(APPEND ZLIB_ARCH_SRCS ${SSSE3_SRCS})
+ set_property(SOURCE ${SSSE3_SRCS} PROPERTY COMPILE_FLAGS "${SSSE3FLAG} ${NOLTOFLAG}")
+ endif()
endif()
if(WITH_PCLMULQDQ AND WITH_SSSE3 AND WITH_SSE4)
check_pclmulqdq_intrinsics()
if(HAVE_PCLMULQDQ_INTRIN AND HAVE_SSSE3_INTRIN)
- add_definitions(-DX86_PCLMULQDQ_CRC)
- set(PCLMULQDQ_SRCS ${ARCHDIR}/crc_folding.c)
- add_feature_info(PCLMUL_CRC 1 "Support CRC hash generation using PCLMULQDQ, using \"${SSSE3FLAG} ${SSE4FLAG} ${PCLMULFLAG}\"")
- list(APPEND ZLIB_ARCH_SRCS ${PCLMULQDQ_SRCS})
- set_property(SOURCE ${PCLMULQDQ_SRCS} PROPERTY COMPILE_FLAGS "${SSSE3FLAG} ${SSE4FLAG} ${PCLMULFLAG} ${NOLTOFLAG}")
+ add_definitions(-DX86_PCLMULQDQ_CRC)
+ set(PCLMULQDQ_SRCS ${ARCHDIR}/crc_folding.c)
+ add_feature_info(PCLMUL_CRC 1 "Support CRC hash generation using PCLMULQDQ, using \"${SSSE3FLAG} ${SSE4FLAG} ${PCLMULFLAG}\"")
+ list(APPEND ZLIB_ARCH_SRCS ${PCLMULQDQ_SRCS})
+ set_property(SOURCE ${PCLMULQDQ_SRCS} PROPERTY COMPILE_FLAGS "${SSSE3FLAG} ${SSE4FLAG} ${PCLMULFLAG} ${NOLTOFLAG}")
+ endif()
endif()
endif()
endif()
-endif()
message(STATUS "Architecture-specific source files: ${ZLIB_ARCH_SRCS}")
projects / thirdparty / zlib-ng.git / commitdiff
