crypto: qat - add compression slice count for rate limiting

In QAT GEN4 devices, the compression slice count was tracked using the
dcpr_cnt field.

Introduce a new cpr_cnt field in the rate limiting (RL) infrastructure to
track the compression (CPR) slice count independently. The cpr_cnt value is
populated via the RL_INIT admin message.

The existing dcpr_cnt field will now be used exclusively to cache the
decompression slice count, ensuring a clear separation between compression
and decompression tracking.

Signed-off-by: Suman Kumar Chakraborty <suman.kumar.chakraborty@intel.com>
Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

diff --git a/drivers/crypto/intel/qat/qat_common/adf_rl.h b/drivers/crypto/intel/qat/qat_common/adf_rl.h
index 59f88591615772f52cb0a92982c14032be116092..c1f3f9a5119582f43d3dfb01722cec683ae2e2cb 100644 (file)
--- a/drivers/crypto/intel/qat/qat_common/adf_rl.h
+++ b/drivers/crypto/intel/qat/qat_common/adf_rl.h
@@ -68,6 +68,7 @@ struct rl_slice_cnt {
        u8 dcpr_cnt;
        u8 pke_cnt;
        u8 cph_cnt;
+       u8 cpr_cnt;
 };
 
 struct adf_rl_interface_data {

diff --git a/drivers/crypto/intel/qat/qat_common/adf_rl_admin.c b/drivers/crypto/intel/qat/qat_common/adf_rl_admin.c
index 698a14f4ce66a831a59f46b1b420b35de0a7e8c6..4a3e0591fdba9a96a6255ae14fcab2002e02a40f 100644 (file)
--- a/drivers/crypto/intel/qat/qat_common/adf_rl_admin.c
+++ b/drivers/crypto/intel/qat/qat_common/adf_rl_admin.c
@@ -63,6 +63,7 @@ int adf_rl_send_admin_init_msg(struct adf_accel_dev *accel_dev,
        slices_int->pke_cnt = slices_resp.pke_cnt;
        /* For symmetric crypto, slice tokens are relative to the UCS slice */
        slices_int->cph_cnt = slices_resp.ucs_cnt;
+       slices_int->cpr_cnt = slices_resp.cpr_cnt;
 
        return 0;
 }