arm64: dts: lx2160a: rename pinmux nodes for readability

LX2160A pinmux is done in groups by various length bitfields within
configuration registers.

Each group of pins is named in the reference manual after a primary
function using soc-specific naming, e.g. IIC1 (for i2c0).

Hardware block numbering starts from zero in device-tree but one in the
reference manual.

Rename the already defined pinmux nodes originally added for changing
i2c pins between i2c and gpio functions reflecting the reference manual
name (IIC) in the node name, and the device-tree name (i2c, gpio) in the
label.

Specifically, drop the "_scl" suffix from the I2C labels because the
nodes actually configure both SDA and SCL pins together. Instead add
"_pins" suffix to avoid conflicts with I2C controller labels.

For GPIO functions, include the specific controller and pin numbers in
the label to clarify they are generic GPIOs and help spot mistakes.

No functional change intended.

Fixes: 8a1365c7bbc1 ("arm64: dts: lx2160a: add pinmux and i2c gpio to support bus recovery")
Signed-off-by: Josua Mayer <josua@solid-run.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>

diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
index 41c9b4253f4a5736377df6409e9f040aa22098bf..28500e887390909e9d02e329c367064b8382a74c 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
@@ -750,8 +750,8 @@
                        clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
                                            QORIQ_CLK_PLL_DIV(16)>;
                        pinctrl-names = "default", "gpio";
-                       pinctrl-0 = <&i2c0_scl>;
-                       pinctrl-1 = <&i2c0_scl_gpio>;
+                       pinctrl-0 = <&i2c0_pins>;
+                       pinctrl-1 = <&gpio0_3_2_pins>;
                        scl-gpios = <&gpio0 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
                        status = "disabled";
                };
@@ -766,8 +766,8 @@
                        clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
                                            QORIQ_CLK_PLL_DIV(16)>;
                        pinctrl-names = "default", "gpio";
-                       pinctrl-0 = <&i2c1_scl>;
-                       pinctrl-1 = <&i2c1_scl_gpio>;
+                       pinctrl-0 = <&i2c1_pins>;
+                       pinctrl-1 = <&gpio0_31_30_pins>;
                        scl-gpios = <&gpio0 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
                        status = "disabled";
                };
@@ -782,8 +782,8 @@
                        clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
                                            QORIQ_CLK_PLL_DIV(16)>;
                        pinctrl-names = "default", "gpio";
-                       pinctrl-0 = <&i2c2_scl>;
-                       pinctrl-1 = <&i2c2_scl_gpio>;
+                       pinctrl-0 = <&i2c2_pins>;
+                       pinctrl-1 = <&gpio0_29_28_pins>;
                        scl-gpios = <&gpio0 29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
                        status = "disabled";
                };
@@ -798,8 +798,8 @@
                        clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
                                            QORIQ_CLK_PLL_DIV(16)>;
                        pinctrl-names = "default", "gpio";
-                       pinctrl-0 = <&i2c3_scl>;
-                       pinctrl-1 = <&i2c3_scl_gpio>;
+                       pinctrl-0 = <&i2c3_pins>;
+                       pinctrl-1 = <&gpio0_27_26_pins>;
                        scl-gpios = <&gpio0 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
                        status = "disabled";
                };
@@ -814,8 +814,8 @@
                        clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
                                            QORIQ_CLK_PLL_DIV(16)>;
                        pinctrl-names = "default", "gpio";
-                       pinctrl-0 = <&i2c4_scl>;
-                       pinctrl-1 = <&i2c4_scl_gpio>;
+                       pinctrl-0 = <&i2c4_pins>;
+                       pinctrl-1 = <&gpio0_25_24_pins>;
                        scl-gpios = <&gpio0 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
                        status = "disabled";
                };
@@ -830,8 +830,8 @@
                        clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
                                            QORIQ_CLK_PLL_DIV(16)>;
                        pinctrl-names = "default", "gpio";
-                       pinctrl-0 = <&i2c5_scl>;
-                       pinctrl-1 = <&i2c5_scl_gpio>;
+                       pinctrl-0 = <&i2c5_pins>;
+                       pinctrl-1 = <&gpio0_23_22_pins>;
                        scl-gpios = <&gpio0 23 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
                        status = "disabled";
                };
@@ -846,8 +846,8 @@
                        clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
                                            QORIQ_CLK_PLL_DIV(16)>;
                        pinctrl-names = "default", "gpio";
-                       pinctrl-0 = <&i2c6_scl>;
-                       pinctrl-1 = <&i2c6_scl_gpio>;
+                       pinctrl-0 = <&i2c6_i2c7_pins>;
+                       pinctrl-1 = <&gpio1_18_15_pins>;
                        scl-gpios = <&gpio1 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
                        status = "disabled";
                };
@@ -862,8 +862,8 @@
                        clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
                                            QORIQ_CLK_PLL_DIV(16)>;
                        pinctrl-names = "default", "gpio";
-                       pinctrl-0 = <&i2c6_scl>;
-                       pinctrl-1 = <&i2c6_scl_gpio>;
+                       pinctrl-0 = <&i2c6_i2c7_pins>;
+                       pinctrl-1 = <&gpio1_18_15_pins>;
                        scl-gpios = <&gpio1 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
                        status = "disabled";
                };
@@ -1713,11 +1713,11 @@
                        pinctrl-single,register-width = <32>;
                        pinctrl-single,function-mask = <0x7>;
 
-                       i2c1_scl: i2c1-scl-pins {
+                       i2c1_pins: iic2-i2c-pins {
                                pinctrl-single,bits = <0x0 0 0x7>;
                        };
 
-                       i2c1_scl_gpio: i2c1-scl-gpio-pins {
+                       gpio0_31_30_pins: iic2-gpio-pins {
                                pinctrl-single,bits = <0x0 0x1 0x7>;
                        };
 
@@ -1725,35 +1725,35 @@
                                pinctrl-single,bits = <0x0 0x6 0x7>;
                        };
 
-                       i2c2_scl: i2c2-scl-pins {
+                       i2c2_pins: iic3-i2c-pins {
                                pinctrl-single,bits = <0x0 0 (0x7 << 3)>;
                        };
 
-                       i2c2_scl_gpio: i2c2-scl-gpio-pins {
+                       gpio0_29_28_pins: iic3-gpio-pins {
                                pinctrl-single,bits = <0x0 (0x1 << 3) (0x7 << 3)>;
                        };
 
-                       i2c3_scl: i2c3-scl-pins {
+                       i2c3_pins: iic4-i2c-pins {
                                pinctrl-single,bits = <0x0 0 (0x7 << 6)>;
                        };
 
-                       i2c3_scl_gpio: i2c3-scl-gpio-pins {
+                       gpio0_27_26_pins: iic4-gpio-pins {
                                pinctrl-single,bits = <0x0 (0x1 << 6) (0x7 << 6)>;
                        };
 
-                       i2c4_scl: i2c4-scl-pins {
+                       i2c4_pins: iic5-i2c-pins {
                                pinctrl-single,bits = <0x0 0 (0x7 << 9)>;
                        };
 
-                       i2c4_scl_gpio: i2c4-scl-gpio-pins {
+                       gpio0_25_24_pins: iic5-gpio-pins {
                                pinctrl-single,bits = <0x0 (0x1 << 9) (0x7 << 9)>;
                        };
 
-                       i2c5_scl: i2c5-scl-pins {
+                       i2c5_pins: iic6-i2c-pins {
                                pinctrl-single,bits = <0x0 0 (0x7 << 12)>;
                        };
 
-                       i2c5_scl_gpio: i2c5-scl-gpio-pins {
+                       gpio0_23_22_pins: iic6-gpio-pins {
                                pinctrl-single,bits = <0x0 (0x1 << 12) (0x7 << 12)>;
                        };
 
@@ -1777,19 +1777,19 @@
                                pinctrl-single,bits = <0x0 (0x1 << 27) (0x7 << 27)>;
                        };
 
-                       i2c6_scl: i2c6-scl-pins {
-                               pinctrl-single,bits = <0x4 0x2 0x7>;
+                       gpio1_18_15_pins: iic8-iic7-gpio-pins {
+                               pinctrl-single,bits = <0x4 0x1 0x7>;
                        };
 
-                       i2c6_scl_gpio: i2c6-scl-gpio-pins {
-                               pinctrl-single,bits = <0x4 0x1 0x7>;
+                       i2c6_i2c7_pins: iic8-iic7-i2c-pins {
+                               pinctrl-single,bits = <0x4 0x2 0x7>;
                        };
 
-                       i2c0_scl: i2c0-scl-pins {
+                       i2c0_pins: iic1-i2c-pins {
                                pinctrl-single,bits = <0x8 0x0 (0x1 << 10)>;
                        };
 
-                       i2c0_scl_gpio: i2c0-scl-gpio-pins {
+                       gpio0_3_2_pins: iic1-gpio-pins {
                                pinctrl-single,bits = <0x8 (0x1 << 10) (0x1 << 10)>;
                        };
                };