interconnect: qcom: sm8650: add the MASTER_APSS_NOC

Add the MASTER_APSS_NOC interconnect node of the system NoC
and the associated QoS configuration.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250415-topic-sm8650-upstream-icc-apss-noc-v1-2-9e6bea3943d8@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>

diff --git a/drivers/interconnect/qcom/sm8650.c b/drivers/interconnect/qcom/sm8650.c
index f6911891503a7ed65be8bc37ed600e87d4cfcc42..1eb2cc3bea672a01f88bfcf24fd82395a07ea36f 100644 (file)
--- a/drivers/interconnect/qcom/sm8650.c
+++ b/drivers/interconnect/qcom/sm8650.c
@@ -847,6 +847,24 @@ static struct qcom_icc_node qnm_aggre2_noc = {
        .links = { SM8650_SLAVE_SNOC_GEM_NOC_SF },
 };
 
+static struct qcom_icc_qosbox qnm_apss_noc_qos = {
+       .num_ports = 1,
+       .port_offsets = { 0x1c000 },
+       .prio = 2,
+       .urg_fwd = 0,
+       .prio_fwd_disable = 1,
+};
+
+static struct qcom_icc_node qnm_apss_noc = {
+       .name = "qnm_apss_noc",
+       .id = SM8650_MASTER_APSS_NOC,
+       .channels = 1,
+       .buswidth = 4,
+       .qosbox = &qnm_apss_noc_qos,
+       .num_links = 1,
+       .links = { SM8650_SLAVE_SNOC_GEM_NOC_SF },
+};
+
 static struct qcom_icc_node qns_a1noc_snoc = {
        .name = "qns_a1noc_snoc",
        .id = SM8650_SLAVE_A1NOC_SNOC,
@@ -1946,6 +1964,7 @@ static struct qcom_icc_node * const system_noc_nodes[] = {
        [MASTER_A1NOC_SNOC] = &qnm_aggre1_noc,
        [MASTER_A2NOC_SNOC] = &qnm_aggre2_noc,
        [SLAVE_SNOC_GEM_NOC_SF] = &qns_gemnoc_sf,
+       [MASTER_APSS_NOC] = &qnm_apss_noc,
 };
 
 static const struct qcom_icc_desc sm8650_system_noc = {

diff --git a/drivers/interconnect/qcom/sm8650.h b/drivers/interconnect/qcom/sm8650.h
index de35c956fe4995aba9e962e52f47bf773b2211c1..b6610225b38acce12c47046769bb0460a1ae4229 100644 (file)
--- a/drivers/interconnect/qcom/sm8650.h
+++ b/drivers/interconnect/qcom/sm8650.h
@@ -139,5 +139,6 @@
 #define SM8650_SLAVE_USB3_0                    127
 #define SM8650_SLAVE_VENUS_CFG                 128
 #define SM8650_SLAVE_VSENSE_CTRL_CFG           129
+#define SM8650_MASTER_APSS_NOC                 130
 
 #endif