]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: imx8dxl-ss-ddr: Add DB (system interconnects) pmu support for i.MX8DXL
authorJacky Bai <ping.bai@nxp.com>
Mon, 3 Nov 2025 21:48:33 +0000 (16:48 -0500)
committerShawn Guo <shawnguo@kernel.org>
Mon, 29 Dec 2025 02:48:29 +0000 (10:48 +0800)
Add DB pmu related nodes. This pmu is in DB (system interconnects).

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/imx8dxl-ss-ddr.dtsi
arch/arm64/boot/dts/freescale/imx8dxl.dtsi

index 3569abb5bb9befd4d1504e3e2a352c64229533c0..adc6e394dbc5598c50e0e288ee605ac91087d36b 100644 (file)
@@ -7,3 +7,25 @@
        compatible = "fsl,imx8dxl-ddr-pmu", "fsl,imx8-ddr-pmu";
        interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
 };
+
+&ddr_subsys {
+       db_pmu0: db-pmu@5ca40000 {
+               compatible = "fsl,imx8dxl-db-pmu";
+               reg = <0x5ca40000 0x10000>;
+               interrupt-parent = <&gic>;
+               interrupts = <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&db_pmu0_lpcg IMX_LPCG_CLK_4>, <&db_pmu0_lpcg IMX_LPCG_CLK_0>;
+               clock-names = "ipg", "cnt";
+       };
+
+       db_pmu0_lpcg: clock-controller@5cae0000 {
+               compatible = "fsl,imx8qxp-lpcg";
+               reg = <0x5cae0000 0x10000>;
+               #clock-cells = <1>;
+               clocks = <&db_ipg_clk>, <&db_ipg_clk>;
+               clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_4>;
+               clock-output-names = "perf_lpcg_cnt_clk",
+                                    "perf_lpcg_ipg_clk";
+               power-domains = <&pd IMX_SC_R_PERF>;
+       };
+};
index 8d60827822ed1cc6cfb1a9369faaebfd711708d1..5106be2fde6e025cc066b796ba7987d0d9c21bd5 100644 (file)
                clock-output-names = "xtal_24MHz";
        };
 
+       db_ipg_clk: clock-db-ipg {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <456000000>;
+               clock-output-names = "db_ipg_clk";
+       };
+
        /* sorted in register address */
        #include "imx8-ss-cm40.dtsi"
        #include "imx8-ss-adma.dtsi"