]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/msm/dpu: correct DP MST interface configuration
authorDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Wed, 25 Mar 2026 05:32:27 +0000 (07:32 +0200)
committerDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Wed, 1 Apr 2026 15:02:18 +0000 (18:02 +0300)
Due to historical reasons we ended up with dummy values being specified
for MST-related interfaces some of them had INTF_NONE, others had
non-existing DP controller indices. Those workarounds are no longer
necessary. Fix types and indices for all DP-MST related INTF instances.

The only exception is INTF_3 on SC8180X, which has unique design. It can
be used either with INTF_0 / DP0 or with INTF_4 / DP1. This interface is
left with the dummy value until somebody implements necessary bits for
that platform.

Co-developed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/713988/
Link: https://lore.kernel.org/r/20260325-fix-dp-mst-interfaces-v1-1-186d1de3fa1b@oss.qualcomm.com
16 files changed:
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_12_0_sm8750.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_12_2_glymur.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_13_0_kaanapali.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_4_sa8775p.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_1_sar2130p.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h

index db79f9382f8b4e2c3a09018923f9f2246b3ead1d..2eef5f69832fd973aca012f44aa63434d8068a13 100644 (file)
@@ -377,7 +377,7 @@ static const struct dpu_intf_cfg sm8650_intf[] = {
                .name = "intf_3", .id = INTF_3,
                .base = 0x37000, .len = 0x280,
                .type = INTF_DP,
-               .controller_id = MSM_DP_CONTROLLER_1,
+               .controller_id = MSM_DP_CONTROLLER_0,   /* pair with intf_0 for DP MST */
                .prog_fetch_lines_worst_case = 24,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 30),
                .intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 31),
index 59caa2c2a87c4b9fe86523ff17181193a007e3c4..3889eb8a542888bb41d65b6e7f3a51bbdef74218 100644 (file)
@@ -419,7 +419,7 @@ static const struct dpu_intf_cfg sm8750_intf[] = {
                .name = "intf_3", .id = INTF_3,
                .base = 0x37000, .len = 0x4bc,
                .type = INTF_DP,
-               .controller_id = MSM_DP_CONTROLLER_1,
+               .controller_id = MSM_DP_CONTROLLER_0,   /* pair with intf_0 for DP MST */
                .prog_fetch_lines_worst_case = 24,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 30),
                .intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 31),
index 5e24309b46748e45e357b5ac5e6e0f33dc45cd47..4eb4a0e9803ea152f9040e9137f1bcf409fe6c9b 100644 (file)
@@ -425,7 +425,7 @@ static const struct dpu_intf_cfg glymur_intf[] = {
        }, {
                .name = "intf_3", .id = INTF_3,
                .base = 0x37000, .len = 0x400,
-               .type = INTF_NONE,
+               .type = INTF_DP,
                .controller_id = MSM_DP_CONTROLLER_0,   /* pair with intf_0 for DP MST */
                .prog_fetch_lines_worst_case = 24,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 30),
@@ -457,7 +457,7 @@ static const struct dpu_intf_cfg glymur_intf[] = {
        }, {
                .name = "intf_7", .id = INTF_7,
                .base = 0x3b000, .len = 0x400,
-               .type = INTF_NONE,
+               .type = INTF_DP,
                .controller_id = MSM_DP_CONTROLLER_2,   /* pair with intf_6 for DP MST */
                .prog_fetch_lines_worst_case = 24,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 18),
@@ -465,7 +465,7 @@ static const struct dpu_intf_cfg glymur_intf[] = {
        }, {
                .name = "intf_8", .id = INTF_8,
                .base = 0x3c000, .len = 0x400,
-               .type = INTF_NONE,
+               .type = INTF_DP,
                .controller_id = MSM_DP_CONTROLLER_1,   /* pair with intf_4 for DP MST */
                .prog_fetch_lines_worst_case = 24,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 12),
index bf1940d9c9e90b1956cb5c612c1082ec275b6106..b7b06e45b529bbe1eeb755b79d379105361e2a6f 100644 (file)
@@ -417,7 +417,7 @@ static const struct dpu_intf_cfg kaanapali_intf[] = {
                .name = "intf_3", .id = INTF_3,
                .base = 0x190000, .len = 0x4bc,
                .type = INTF_DP,
-               .controller_id = MSM_DP_CONTROLLER_1,
+               .controller_id = MSM_DP_CONTROLLER_0,   /* pair with intf_0 for DP MST */
                .prog_fetch_lines_worst_case = 24,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 30),
                .intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 31),
index 019135c9a83150988aade8684221e22cca37601f..b608d2bb6d48befc780d622535c99054df0199e5 100644 (file)
@@ -258,7 +258,7 @@ static const struct dpu_intf_cfg sdm845_intf[] = {
                .name = "intf_3", .id = INTF_3,
                .base = 0x6b800, .len = 0x280,
                .type = INTF_DP,
-               .controller_id = MSM_DP_CONTROLLER_1,
+               .controller_id = MSM_DP_CONTROLLER_0,   /* pair with intf_0 for DP MST */
                .prog_fetch_lines_worst_case = 24,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 30),
                .intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 31),
index e61e14572affb116cd2eb5db6a2e505e201f9be1..9729a65d3e3a456bb864380fe4b860482386b95e 100644 (file)
@@ -316,7 +316,7 @@ static const struct dpu_intf_cfg sm8150_intf[] = {
                .name = "intf_3", .id = INTF_3,
                .base = 0x6b800, .len = 0x280,
                .type = INTF_DP,
-               .controller_id = MSM_DP_CONTROLLER_1,
+               .controller_id = MSM_DP_CONTROLLER_0,   /* pair with intf_0 for DP MST */
                .prog_fetch_lines_worst_case = 24,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 30),
                .intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 31),
index ffb89a03cfade79bf26c78211d460fd950046e93..92a614686cb604eef69cf8fa5dc56fedc6d82986 100644 (file)
@@ -230,7 +230,7 @@ static const struct dpu_intf_cfg sm7150_intf[] = {
                .name = "intf_3", .id = INTF_3,
                .base = 0x6b800, .len = 0x280,
                .type = INTF_DP,
-               .controller_id = MSM_DP_CONTROLLER_1,
+               .controller_id = MSM_DP_CONTROLLER_0,   /* pair with intf_0 for DP MST */
                .prog_fetch_lines_worst_case = 24,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 30),
                .intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 31),
index 427ecd4cbf63d2213b39ff4a83f90a705faedd6c..87488d3ed95f34a6fee8ba3005fb55a994b5d26c 100644 (file)
@@ -185,7 +185,7 @@ static const struct dpu_intf_cfg sm6150_intf[] = {
                .name = "intf_3", .id = INTF_3,
                .base = 0x6b800, .len = 0x280,
                .type = INTF_DP,
-               .controller_id = MSM_DP_CONTROLLER_1,
+               .controller_id = MSM_DP_CONTROLLER_0,   /* pair with intf_0 for DP MST */
                .prog_fetch_lines_worst_case = 24,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 30),
                .intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 31),
index c481e964fca06b92a3174d17fcb5231f5ee4425b..0e311d54ef188134d479bb5e871529045655f4c6 100644 (file)
@@ -301,7 +301,7 @@ static const struct dpu_intf_cfg sm8250_intf[] = {
                .name = "intf_3", .id = INTF_3,
                .base = 0x6b800, .len = 0x280,
                .type = INTF_DP,
-               .controller_id = MSM_DP_CONTROLLER_1,
+               .controller_id = MSM_DP_CONTROLLER_0,   /* pair with intf_0 for DP MST */
                .prog_fetch_lines_worst_case = 24,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 30),
                .intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 31),
index 9afdfdb3be6fb7c8d690b310b5390e4b608dd3f1..d06c14f05faf8f3d4c9e2364b9c02d737a10425b 100644 (file)
@@ -326,7 +326,7 @@ static const struct dpu_intf_cfg sm8350_intf[] = {
                .name = "intf_3", .id = INTF_3,
                .base = 0x37000, .len = 0x280,
                .type = INTF_DP,
-               .controller_id = MSM_DP_CONTROLLER_1,
+               .controller_id = MSM_DP_CONTROLLER_0,   /* pair with intf_0 for DP MST */
                .prog_fetch_lines_worst_case = 24,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 30),
                .intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 31),
index 07a2c286a7f6b4f127a2f0bea5a6c01de3af172c..0ba907711d36b03fcd6aeab38d5a29e03358f42f 100644 (file)
@@ -288,7 +288,6 @@ static const struct dpu_dsc_cfg sc8280xp_dsc[] = {
        },
 };
 
-/* TODO: INTF 3, 8 and 7 are used for MST, marked as INTF_NONE for now */
 static const struct dpu_intf_cfg sc8280xp_intf[] = {
        {
                .name = "intf_0", .id = INTF_0,
@@ -319,8 +318,8 @@ static const struct dpu_intf_cfg sc8280xp_intf[] = {
        }, {
                .name = "intf_3", .id = INTF_3,
                .base = 0x37000, .len = 0x280,
-               .type = INTF_NONE,
-               .controller_id = MSM_DP_CONTROLLER_0,
+               .type = INTF_DP,
+               .controller_id = MSM_DP_CONTROLLER_0,   /* pair with intf_0 for DP MST */
                .prog_fetch_lines_worst_case = 24,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 30),
                .intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 31),
@@ -351,16 +350,16 @@ static const struct dpu_intf_cfg sc8280xp_intf[] = {
        }, {
                .name = "intf_7", .id = INTF_7,
                .base = 0x3b000, .len = 0x280,
-               .type = INTF_NONE,
-               .controller_id = MSM_DP_CONTROLLER_2,
+               .type = INTF_DP,
+               .controller_id = MSM_DP_CONTROLLER_2,   /* pair with intf_6 for DP MST */
                .prog_fetch_lines_worst_case = 24,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 18),
                .intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 19),
        }, {
                .name = "intf_8", .id = INTF_8,
                .base = 0x3c000, .len = 0x280,
-               .type = INTF_NONE,
-               .controller_id = MSM_DP_CONTROLLER_1,
+               .type = INTF_DP,
+               .controller_id = MSM_DP_CONTROLLER_1,   /* pair with intf_8 for DP MST */
                .prog_fetch_lines_worst_case = 24,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 12),
                .intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 13),
index bdab0ebfe10284c9f85eadb20b30d8f9959b2e0a..170a709f987c7537a31a81b9ccd342a561f3677e 100644 (file)
@@ -339,7 +339,7 @@ static const struct dpu_intf_cfg sm8450_intf[] = {
                .name = "intf_3", .id = INTF_3,
                .base = 0x37000, .len = 0x280,
                .type = INTF_DP,
-               .controller_id = MSM_DP_CONTROLLER_1,
+               .controller_id = MSM_DP_CONTROLLER_0,   /* pair with intf_0 for DP MST */
                .prog_fetch_lines_worst_case = 24,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 30),
                .intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 31),
index f3d85d173c56b6f46f4ac26dbe13313318953608..9cc5e22e1228278071df4df1acc69badb9121bb8 100644 (file)
@@ -315,7 +315,6 @@ static const struct dpu_wb_cfg sa8775p_wb[] = {
        },
 };
 
-/* TODO: INTF 3, 6, 7 and 8 are used for MST, marked as INTF_NONE for now */
 static const struct dpu_intf_cfg sa8775p_intf[] = {
        {
                .name = "intf_0", .id = INTF_0,
@@ -346,7 +345,7 @@ static const struct dpu_intf_cfg sa8775p_intf[] = {
        }, {
                .name = "intf_3", .id = INTF_3,
                .base = 0x37000, .len = 0x280,
-               .type = INTF_NONE,
+               .type = INTF_DP,
                .controller_id = MSM_DP_CONTROLLER_0,   /* pair with intf_0 for DP MST */
                .prog_fetch_lines_worst_case = 24,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 30),
@@ -362,7 +361,7 @@ static const struct dpu_intf_cfg sa8775p_intf[] = {
        }, {
                .name = "intf_6", .id = INTF_6,
                .base = 0x3A000, .len = 0x280,
-               .type = INTF_NONE,
+               .type = INTF_DP,
                .controller_id = MSM_DP_CONTROLLER_0,   /* pair with intf_0 for DP MST */
                .prog_fetch_lines_worst_case = 24,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 16),
@@ -370,7 +369,7 @@ static const struct dpu_intf_cfg sa8775p_intf[] = {
        }, {
                .name = "intf_7", .id = INTF_7,
                .base = 0x3b000, .len = 0x280,
-               .type = INTF_NONE,
+               .type = INTF_DP,
                .controller_id = MSM_DP_CONTROLLER_0,   /* pair with intf_0 for DP MST */
                .prog_fetch_lines_worst_case = 24,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 18),
@@ -378,7 +377,7 @@ static const struct dpu_intf_cfg sa8775p_intf[] = {
        }, {
                .name = "intf_8", .id = INTF_8,
                .base = 0x3c000, .len = 0x280,
-               .type = INTF_NONE,
+               .type = INTF_DP,
                .controller_id = MSM_DP_CONTROLLER_1,   /* pair with intf_4 for DP MST */
                .prog_fetch_lines_worst_case = 24,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 12),
index 5837e252f5d23401be3ded9fe9ebbae88ad9a8ee..b3d0f221807b1e0da2d364fca7c05de43a400756 100644 (file)
@@ -334,7 +334,7 @@ static const struct dpu_intf_cfg sm8550_intf[] = {
                .name = "intf_3", .id = INTF_3,
                .base = 0x37000, .len = 0x280,
                .type = INTF_DP,
-               .controller_id = MSM_DP_CONTROLLER_1,
+               .controller_id = MSM_DP_CONTROLLER_0,   /* pair with intf_0 for DP MST */
                .prog_fetch_lines_worst_case = 24,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 30),
                .intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 31),
index 9cc0b7ea3a307d19e069b349d9f2d6f9a5dd7687..7effe7120a56d1eb438415d33ecce5a1a789f044 100644 (file)
@@ -334,7 +334,7 @@ static const struct dpu_intf_cfg sar2130p_intf[] = {
                .name = "intf_3", .id = INTF_3,
                .base = 0x37000, .len = 0x280,
                .type = INTF_DP,
-               .controller_id = MSM_DP_CONTROLLER_1,
+               .controller_id = MSM_DP_CONTROLLER_0,   /* pair with intf_0 for DP MST */
                .prog_fetch_lines_worst_case = 24,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 30),
                .intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 31),
index 10443368f682925f628e294c7d2cf32899e7240b..7b3febf8742d72effe12db815279a9b96228623c 100644 (file)
@@ -303,7 +303,6 @@ static const struct dpu_wb_cfg x1e80100_wb[] = {
        },
 };
 
-/* TODO: INTF 3, 8 and 7 are used for MST, marked as INTF_NONE for now */
 static const struct dpu_intf_cfg x1e80100_intf[] = {
        {
                .name = "intf_0", .id = INTF_0,
@@ -334,7 +333,7 @@ static const struct dpu_intf_cfg x1e80100_intf[] = {
        }, {
                .name = "intf_3", .id = INTF_3,
                .base = 0x37000, .len = 0x280,
-               .type = INTF_NONE,
+               .type = INTF_DP,
                .controller_id = MSM_DP_CONTROLLER_0,   /* pair with intf_0 for DP MST */
                .prog_fetch_lines_worst_case = 24,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 30),
@@ -366,7 +365,7 @@ static const struct dpu_intf_cfg x1e80100_intf[] = {
        }, {
                .name = "intf_7", .id = INTF_7,
                .base = 0x3b000, .len = 0x280,
-               .type = INTF_NONE,
+               .type = INTF_DP,
                .controller_id = MSM_DP_CONTROLLER_2,   /* pair with intf_6 for DP MST */
                .prog_fetch_lines_worst_case = 24,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 18),
@@ -374,7 +373,7 @@ static const struct dpu_intf_cfg x1e80100_intf[] = {
        }, {
                .name = "intf_8", .id = INTF_8,
                .base = 0x3c000, .len = 0x280,
-               .type = INTF_NONE,
+               .type = INTF_DP,
                .controller_id = MSM_DP_CONTROLLER_1,   /* pair with intf_4 for DP MST */
                .prog_fetch_lines_worst_case = 24,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 12),